Commits · e299a0814956f2391b4fbc540cc8e6dd2e15d58f · Roger Ferrer / llvm-epi · GitLab

Feb 10, 2020
- [AArch64][SVE] SVE2 intrinsics for character match & histogram generation · e299a081
  Kerry McLaughlin authored Feb 10, 2020
  e299a081
- [AArch64][SVE] Add SVE2 intrinsics for widening DSP operations · 5e1d7bb6
  Kerry McLaughlin authored Feb 10, 2020
  5e1d7bb6
- [DSE] Add tests for MemorySSA based DSE. · da52b9c1
  Florian Hahn authored Dec 06, 2019
  da52b9c1
- [CSInfo] Fix the assertions regarding updating the CSInfo · 3a4dc577
  Djordje Todorovic authored Feb 10, 2020
  3a4dc577
- [AMDGPU] Add a16 feature to gfx10 · 87568691
  Sebastian Neubauer authored Jan 29, 2020
  87568691
- [Attributor][FIX] Make check lines explicit · d2e434a4
  Johannes Doerfert authored Feb 10, 2020
  d2e434a4
- [Attributor] Simple casts preserve no-alias property · 87ddf1f4
  Johannes Doerfert authored Jan 25, 2020
  87ddf1f4
- [Attributor][Tests] Run the CGSCC versions on the range.ll test · 1c0ebcca
  Johannes Doerfert authored Feb 09, 2020
  
  1c0ebcca
- [Attributor] Allow PHI nodes in AAValueConstantRangeFloating · 81554393
  Johannes Doerfert authored Feb 09, 2020
  81554393
- [Attributor][FIX] Remove FIXME that seems outdated · 63adbb9a
  Johannes Doerfert authored Feb 09, 2020
  63adbb9a
- [Attributor] Allow SelectInst in AAValueConstantRangeFloating · 7e7e6594
  Johannes Doerfert authored Feb 09, 2020
  7e7e6594
- [Attributor] Look through (some) casts in AAValueConstantRangeFloating · ffdbd2a0
  Johannes Doerfert authored Feb 09, 2020
  ffdbd2a0
- [Attributor][FIX] Call right base method in AAValueConstantRangeFloating · 028db8c4
  Johannes Doerfert authored Feb 09, 2020
  028db8c4
- [X86] Autogenerate complete checks. NFC · d0a6b32b
  Craig Topper authored Feb 09, 2020
  
  d0a6b32b
- [Attributor][Tests][NFC] Add more range tests · 103364b4
  Johannes Doerfert authored Feb 09, 2020
  103364b4
- [X86] Make (insert_vector_elt (v8i16 zerovec), i16 %x, 0) generate the same... · 06ba969c
  Craig Topper authored Feb 09, 2020
  06ba969c
- [X86] Autogenerate complete checks. NFC · f24c43c0
  Craig Topper authored Feb 09, 2020
  
  f24c43c0
- [X86] Use MOVZX instead of MOVSX in f16_to_fp isel patterns. · 05d44204
  Craig Topper authored Feb 09, 2020
  05d44204
- [RISCV] Fix incorrect FP base CFI offset for variable argument functions · 64f41720
  Shiva Chen authored Feb 03, 2020
  64f41720
- GlobalISel: Fix narrowScalar for G_{CTLZ|CTTZ}_ZERO_UNDEF · 312a9d1b
  Matt Arsenault authored Feb 07, 2020
  312a9d1b
- AMDGPU/GlobalISel: Split 64-bit G_CTPOP in RegBankSelect · c437f6c6
  Matt Arsenault authored Jan 25, 2020
  
  c437f6c6
- GlobalISel: Fix narrowing of G_CTLZ/G_CTTZ · 6135f5ed
  Matt Arsenault authored Feb 07, 2020
  6135f5ed
- AMDGPU/GlobalISel: Don't mis-select vector index on a constant · 2126c70e
  Matt Arsenault authored Feb 06, 2020
  2126c70e
- AMDGPU/GlobalISel: Look through casts when legalizing vector indexing · f4a38c11
  Matt Arsenault authored Feb 06, 2020
  f4a38c11
Feb 09, 2020
- AMDGPU: Fix SI_IF lowering when the save exec reg has terminator uses · 6e177082
  Matt Arsenault authored Dec 27, 2019
  6e177082
- [X86] combineConcatVectorOps - combine VROTLI/VROTRI ops · 29e646fe
  Simon Pilgrim authored Feb 09, 2020
  29e646fe
- [X86] Use custom isel for (X86sbb_flag 0, 0) so we can use 32-bit SBB for i8/i16. · 656d66f5
  Craig Topper authored Feb 09, 2020
  656d66f5
- [X86] Add lowerShuffleAsBitRotate (PR44379) · e82e17d4
  Simon Pilgrim authored Feb 09, 2020
  e82e17d4
- [X86][XOP] Add XOP target to vXi16/vXi8 shuffle tests · 0ae119f8
  Simon Pilgrim authored Feb 09, 2020
  0ae119f8
- [X86][SSE] Add more tests showing failure to lower shuffles as bit rotations · 22780731
  Simon Pilgrim authored Feb 09, 2020
  
  22780731
- [VectorCombine] new IR transform pass for partial vector ops · a17f03bd
  Sanjay Patel authored Feb 09, 2020
  a17f03bd
- [X86] Recognise ROTLI/ROTRI rotations as faux shuffles · 644d56b4
  Simon Pilgrim authored Feb 09, 2020
  644d56b4
- [LoopExtractor] Convert LoopExtractor from LoopPass to ModulePass · 3b70ee27
  Ehud Katz authored Feb 09, 2020
  3b70ee27
- [AggressiveInstCombine] Add test with baseline CHECKs for aggressive inst combine for SELECT. · 10c7b770
  Ayman Musa authored Jan 28, 2020
  
  10c7b770
- Support -fstack-clash-protection for x86 · e67cbac8
  serge_sans_paille authored Sep 09, 2019
  e67cbac8
- Revert "Support -fstack-clash-protection for x86" · 45462116
  serge-sans-paille authored Feb 09, 2020
  45462116
- Support -fstack-clash-protection for x86 · 0fd51a45
  serge_sans_paille authored Sep 09, 2019
  0fd51a45
- [Attributor] Add an Attributor CGSCC pass and run it · b0c77c36
  Johannes Doerfert authored Nov 27, 2019
  b0c77c36
- [OpenMP][Opt] Delete terminating and read-only parallel regions · e565db49
  Johannes Doerfert authored Feb 08, 2020
  e565db49
Feb 08, 2020
- Fix test name typo · 835c8192
  Simon Pilgrim authored Feb 08, 2020
  
  835c8192