Commits · e3e36f80f5cb9559dfbc27e04cc72376258d8f19 · Roger Ferrer / llvm-epi · GitLab

Sep 28, 2011
- Unbreak CMake build. · e3e36f80
  Ted Kremenek authored Sep 27, 2011
  e3e36f80
- Implement TII::get/setExecutionDomain() for ARM. · f9b71a2e
  Jakob Stoklund Olesen authored Sep 27, 2011
  f9b71a2e
- Promote the X86 Get/SetSSEDomain functions to TargetInstrInfo. · b48c994c
  Jakob Stoklund Olesen authored Sep 27, 2011
  b48c994c
- ARM Thumb2 asm parsing [SU]XT[BH] without rotate but with .w. · c63af1b7
  Jim Grosbach authored Sep 27, 2011
  c63af1b7
- This is the start of the new SjLj EH preparation pass, which will replace the · 354ff9e3
  Bill Wendling authored Sep 27, 2011
  354ff9e3
- Embed patterns in definitions of MFC1 and MTC1 instead of defining them outside · a5d18f2d
  Akira Hatanaka authored Sep 27, 2011
  a5d18f2d
Sep 27, 2011
- Rename AddSelectionDAGCSEId() to addSelectionDAGCSEId(). · af136f71
  Jim Grosbach authored Sep 27, 2011
  af136f71
- PTX: Fix case where printed alignment could be 0 · 4f7054e5
  Justin Holewinski authored Sep 27, 2011
  4f7054e5
- PTX: Use external symbols to keep track of params and locals. This also fixes · e0745934
  Justin Holewinski authored Sep 27, 2011
  e0745934
- Use existing function. · 1c759769
  Jakob Stoklund Olesen authored Sep 27, 2011
  1c759769
- Fix function MipsRegisterInfo::getRegisterNumbering. · e41b1d59
  Akira Hatanaka authored Sep 27, 2011
  e41b1d59
- Do not add the pass that restores $gp if target is Mips64. · ff5d0965
  Akira Hatanaka authored Sep 27, 2011
  ff5d0965
- Mark MipsPseudo isPseudo. · bb050745
  Akira Hatanaka authored Sep 27, 2011
  bb050745
- PTX: Add support for sitofp in backend · 9f01f893
  Justin Holewinski authored Sep 27, 2011
  9f01f893
- Remove extraneous commit garbage. · b1a9f654
  Owen Anderson authored Sep 26, 2011
  b1a9f654
Sep 26, 2011
- Set register class of a register according to value of HasMips64. · a6a9c20c
  Akira Hatanaka authored Sep 26, 2011
  a6a9c20c
- Define variable HasMips64 in MipsTargetLowering. · 7b502920
  Akira Hatanaka authored Sep 26, 2011
  7b502920
- In single float mode, double precision FP arguments are passed in integer · e5ce7090
  Akira Hatanaka authored Sep 26, 2011
  e5ce7090
- ASR #32 is not allowed on Thumb2 USAT and SSAT instructions. · f01e2de5
  Owen Anderson authored Sep 26, 2011
  f01e2de5
- PTX: Fix memcpy intrinsic to handle 64-bit pointers · da2919db
  Justin Holewinski authored Sep 26, 2011
  da2919db
- PTX: Implement PTXSelectionDAGInfo · b40da7f9
  Justin Holewinski authored Sep 26, 2011
  b40da7f9
- PTX: Implement ISD::ANY_EXTEND · c3edaddf
  Justin Holewinski authored Sep 26, 2011
  c3edaddf
- PTX: Fix detection of stack load/store vs. global load/store, as well as fix the · 1395cf84
  Justin Holewinski authored Sep 26, 2011
  1395cf84
- PTX: SM > 2.0 implies +double · f8dd701b
  Justin Holewinski authored Sep 26, 2011
  f8dd701b
- PTX: Fix some lingering issues with stack allocation · 14defde0
  Justin Holewinski authored Sep 26, 2011
  14defde0
- PTX: Split up the TableGen instruction definitions into logical units · 37fd8767
  Justin Holewinski authored Sep 26, 2011
  37fd8767
- PTX: Unify handling of loads/stores · d40f5aba
  Justin Holewinski authored Sep 26, 2011
  d40f5aba
- PTX: Handle FrameIndex nodes · 8c800193
  Justin Holewinski authored Sep 26, 2011
  8c800193
- PR11004: Inline memcpy to avoid generating nested call sequence. Un-XFAIL... · b1fbf9ff
  David Meyer authored Sep 26, 2011
  b1fbf9ff
- Fix VEX decoding in i386 mode. Fixes PR11008. · 45faba98
  Craig Topper authored Sep 26, 2011
  45faba98
Sep 25, 2011
- Clean up code after renaming LowerSubregs -> ExpandPostRAPseudos. · fd719d18
  Jakob Stoklund Olesen authored Sep 25, 2011
  fd719d18
Sep 24, 2011
- Add .td file. · 7d7ee0c3
  Akira Hatanaka authored Sep 24, 2011
  7d7ee0c3
- Preparation for adding simple Mips64 instructions. · e96273e7
  Akira Hatanaka authored Sep 24, 2011
  e96273e7
- Only run MF.verify() with EXPENSIVE_CHECKS=1. · 55cf2ed1
  Jakob Stoklund Olesen authored Sep 24, 2011
  55cf2ed1
- Teach the Thumb2 AsmParser to accept pre-indexed loads/stores with an offset of #-0. · 4916840e
  Owen Anderson authored Sep 23, 2011
  4916840e
- Also match negative offsets for addrmode3 and addrmode5. · 2056d15b
  Jakob Stoklund Olesen authored Sep 23, 2011
  2056d15b
Sep 23, 2011
- Add more fixed bits to USAT16 encoding to filter out incorrect decodings. · b0b865d6
  Owen Anderson authored Sep 23, 2011
  b0b865d6
- Post-index loads/stores in still need to print the post-indexed immediate,... · 737beaf8
  Owen Anderson authored Sep 23, 2011
  737beaf8
- Reapply r140412 (Thumb2 reg-reg loads cannot target SP or PC), with invalid testcases updated. · 987a8789
  Owen Anderson authored Sep 23, 2011
  987a8789
- Revert r140412. This affects more instructions than intended. · ffa8428a
  Owen Anderson authored Sep 23, 2011
  ffa8428a