Commits · e5be543a55986e353d40d79702eef5cff3934348 · Roger Ferrer / llvm-epi · GitLab

Oct 20, 2019
- AMDGPU: Increase vcc liveness scan threshold · e5be543a
  Matt Arsenault authored Oct 20, 2019
  e5be543a
- AMDGPU: Split flat offsets that don't fit in DAG · 7cd57dcd
  Matt Arsenault authored Oct 20, 2019
  7cd57dcd
- AMDGPU: Fix missing OPERAND_IMMEDIATE · 1aad3835
  Matt Arsenault authored Oct 20, 2019
  1aad3835
- AMDGPU: Don't re-get the subtarget · fc205f1d
  Matt Arsenault authored Oct 20, 2019
  fc205f1d
- AMDGPU: Don't error on calls to null or undef · 8a8b3174
  Matt Arsenault authored Oct 20, 2019
  8a8b3174
Oct 19, 2019
- [X86] Pulled out helper to decode target shuffle element sentinel values to... · 10213b90
  Simon Pilgrim authored Oct 19, 2019
  10213b90
- [TargetLowering][DAGCombine][MSP430] add/use hook for Shift Amount Threshold (1/2) · a298964d
  Sanjay Patel authored Oct 19, 2019
  a298964d
- [X86][SSE] lowerV16I8Shuffle - tryToWidenViaDuplication - undef unpack args · b5088aa9
  Simon Pilgrim authored Oct 19, 2019
  b5088aa9
- [X86][SSE] LowerUINT_TO_FP_i64 - only use HADDPD for size/fast-hops · 6ada70d1
  Simon Pilgrim authored Oct 19, 2019
  6ada70d1
- Prune a LegacyDivergenceAnalysis and MachineLoopInfo include each · 904cd3e0
  Reid Kleckner authored Oct 19, 2019
  904cd3e0
- Prune Analysis includes from SelectionDAG.h · 0ad6c191
  Reid Kleckner authored Oct 19, 2019
  0ad6c191
- Move endian constant from Host.h to SwapByteOrder.h, prune include · 90c64a34
  Reid Kleckner authored Oct 19, 2019
  90c64a34
- Prune two MachineInstr.h includes, fix up deps · 1d7b4136
  Reid Kleckner authored Oct 19, 2019
  1d7b4136
- [AMDGPU] move PHI nodes to AGPR class · 0fab220e
  Stanislav Mekhanoshin authored Oct 18, 2019
  0fab220e
Oct 18, 2019
- [AMDGPU] Remove -amdgpu-spill-sgpr-to-smem. · a9aa4ec6
  Jay Foad authored Oct 18, 2019
  a9aa4ec6
- [X86] Fix register parsing in .seh_* in Intel syntax · 52d76554
  Reid Kleckner authored Oct 18, 2019
  52d76554
- [GISel][CallLowering] Make isIncomingArgumentHandler a pure virtual method · 9f9151d4
  Quentin Colombet authored Oct 18, 2019
  9f9151d4
- AMDGPU: Relax 32-bit SGPR register class · f9a42ed0
  Matt Arsenault authored Oct 18, 2019
  f9a42ed0
- AMDGPU: Fix SMEM WAR hazard for gfx10 readlane · 2f41a023
  Austin Kerbow authored Oct 18, 2019
  2f41a023
- [X86] combineX86ShufflesRecursively - pull out isTargetShuffleVariableMask. NFCI. · 696794b6
  Simon Pilgrim authored Oct 18, 2019
  696794b6
- [AMDGPU][MC][GFX10] Added sdwa/dpp versions of v_cndmask_b32 · 6c7d7eeb
  Dmitry Preobrazhensky authored Oct 18, 2019
  6c7d7eeb
- Revert r375152 as it is causing failures on EXPENSIVE_CHECKS bot · dd7021d4
  Nemanja Ivanovic authored Oct 18, 2019
  dd7021d4
- [AMDGPU][MC][GFX9] Corrected parsing of v_cndmask_b32_sdwa · 7d325fe5
  Dmitry Preobrazhensky authored Oct 18, 2019
  7d325fe5
- [AArch64] Adding support for PMMIR_EL1 register · ffcd7698
  Victor Campos authored Oct 18, 2019
  ffcd7698
- [AArch64][SVE] Add SPLAT_VECTOR ISD Node · 84da2596
  Graham Hunter authored Oct 18, 2019
  84da2596
- [AArch64] Don't combine callee-save and local stack adjustment when optimizing for size · 651f0790
  David Green authored Oct 18, 2019
  651f0790
- [AArch64][SVE] Implement unpack intrinsics · 0c7cc383
  Kerry McLaughlin authored Oct 18, 2019
  0c7cc383
- [X86] Emit KTEST when possible · 7b9fd37f
  David Zarzycki authored Oct 18, 2019
  7b9fd37f
Oct 17, 2019
- [AMDGPU] drop getIsFP td helper · befab66a
  Stanislav Mekhanoshin authored Oct 17, 2019
  befab66a
- [PowerPC] Turn on CR-Logical reducer pass · 8a3d7c9c
  Nemanja Ivanovic authored Oct 17, 2019
  8a3d7c9c
- NFC: Fix variable only used in asserts by propagating the value. · 05c3d902
  Sterling Augustine authored Oct 17, 2019
  05c3d902
- [AIX] TOC pseudo expansion for 64bit large + 64bit small + 32bit large models · ffe2ec51
  Xiangling Liao authored Oct 17, 2019
  ffe2ec51
- [AMDGPU] Improve code size cost model · 39720575
  Daniil Fukalov authored Oct 17, 2019
  39720575
- [ARM][MVE] Enable truncating masked stores · 8e6a638c
  Sam Parker authored Oct 17, 2019
  8e6a638c
- [ARM][MVE] Change VPST to use, not def, VPR · 3ff961ca
  Sam Parker authored Oct 17, 2019
  3ff961ca
- [DAGCombine][ARM] Enable extending masked loads · 39af8a3a
  Sam Parker authored Oct 17, 2019
  39af8a3a
- [Alignment][NFC] Use Align for TargetFrameLowering/Subtarget · 882c43d7
  Guillaume Chatelet authored Oct 17, 2019
  882c43d7
- [gicombiner] Add the run-time rule disable option · 329e748c
  Daniel Sanders authored Oct 17, 2019
  329e748c
- [GISel][CombinerHelper] Add concat_vectors(build_vector, build_vector) => build_vector · c319afc9
  Quentin Colombet authored Oct 17, 2019
  c319afc9
- [gicombiner] Hoist pure C++ combine into the tablegen definition · ec5208fd
  Daniel Sanders authored Oct 16, 2019
  ec5208fd