Commits · e6382d23fcc8138d7dec4b23cb1b7f4e5cb4c335 · Roger Ferrer / llvm-epi · GitLab

Apr 22, 2022
- [RISCV] transform MI to W variant to remove sext.w · 5dd99f71
  Mohammed Nurul Hoque authored Apr 22, 2022
  5dd99f71
- [Hexagon] Generate TargetConstant in SelectAnyInt · 0278dee1
  Krzysztof Parzyszek authored Apr 22, 2022
  0278dee1
- [SimpleLoopUnswitch] Add test where all conds are guaranteed non poison. · 1fa0bb8a
  Florian Hahn authored Apr 22, 2022
  1fa0bb8a
- [llvm-objcopy][NFC] refactor restoreStatOnFile out of llvm-objcopy. · 79c19910
  Alexey Lapshin authored Apr 13, 2022
  79c19910
- [RISCV][NFC] Adjust some formatting in VL patterns · 98db7ea2
  Fraser Cormack authored Apr 22, 2022
  
  98db7ea2
- [RISCV] Print human-readable VTYPE/SEW/LMUL in MIR · 2b0fedc2
  Fraser Cormack authored Nov 03, 2021
  2b0fedc2
- [InstCombine] Fold (A & 2^C1) + A => A & (2^C1 - 1) iff bit C1 in A is a sign bit (PR21929) · ffe13960
  Simon Pilgrim authored Apr 22, 2022
  ffe13960
- [DAG] Fold freeze(bitcast(x)) -> bitcast(freeze(x)) · 34e72434
  Simon Pilgrim authored Apr 22, 2022
  34e72434
- Revert "[SLP][AArch64] Implement lookahead operand reordering score of splat loads for AArch64" · 7052a0ad
  Vasileios Porpodas authored Apr 22, 2022
  7052a0ad
- [StatepointLowering] Add test for cross-BB gc.relocate lowering · a6d1a76a
  Denis Antrushin authored Apr 22, 2022
  
  a6d1a76a
- llvm-reduce: Fix variable name typo · f7db8b7a
  Matt Arsenault authored Apr 20, 2022
  
  f7db8b7a
- MIR: Serialize FunctionContextIdx in MachineFrameInfo · 9c122537
  Matt Arsenault authored Apr 21, 2022
  
  9c122537
- [InstCombine] Fix typo in test (NFC) · de1e3c64
  Nikita Popov authored Apr 22, 2022
  
  de1e3c64
- AMDGPU: Directly implement computeKnownBits for workitem intrinsics · 794a0bb5
  Matt Arsenault authored Apr 14, 2022
  794a0bb5
- GlobalISel: Relax handling of G_ASSERT_* with source register classes · 40bc9112
  Matt Arsenault authored Apr 15, 2022
  40bc9112
- [InstCombine] Extract code for or of icmp eq zero and icmp fold (NFC) · 369ef9bf
  Nikita Popov authored Apr 22, 2022
  369ef9bf
- [SLP][AArch64] Implement lookahead operand reordering score of splat loads for AArch64 · 7ba70264
  Vasileios Porpodas authored Apr 12, 2022
  7ba70264
- InstCombine: Add tests to show or-and scenarios which can be possibly be... · 237c4bad
  Biplob Mishra authored Apr 22, 2022
  237c4bad
- [AArch64][SVE] Remove BIC from logical operation DestructiveBinaryComm patterns · 3c382ed7
  Paul Walker authored Apr 22, 2022
  3c382ed7
- [InstCombine] Add tests for and of icmp ne zero and icmp uge (NFC) · 074abdcc
  Nikita Popov authored Apr 22, 2022
  074abdcc
- [AArch64][SVE] Add some logical operation DestructiveBinaryComm patterns · e1afae03
  zhongyunde authored Apr 22, 2022
  e1afae03
- [SLP][AArch64][NFC] Add test for a follow-up patch that fixes the lookahead... · ad12f468
  Vasileios Porpodas authored Apr 12, 2022
  ad12f468
- [AArch64] Emit .cfi_negate_ra_state for PAC-auth instructions. · de07cde6
  Daniel Kiss authored Apr 22, 2022
  de07cde6
- [InstCombine] Merge foldAndOfICmps() and foldOrOfICmps() (NFCI) · ba46ae7b
  Nikita Popov authored Apr 22, 2022
  ba46ae7b
- [InstCombine] Fix or of commuted foldable predicates · 3e1d2c35
  Nikita Popov authored Apr 22, 2022
  3e1d2c35
- [InstCombine] Add commuted or of icmp test (NFC) · 2b252c15
  Nikita Popov authored Apr 22, 2022
  
  2b252c15
- [IndVars] Add test for crash exposed by D114650. · 85eb8b72
  Florian Hahn authored Apr 22, 2022
  
  85eb8b72
- [InstCombine] Add test for atomic load from constant global (NFC) · e69c21f7
  Nikita Popov authored Apr 22, 2022
  
  e69c21f7
- [AArch64] Add some splat of load cost model tests. NFC · 091c2f95
  David Green authored Apr 21, 2022
  091c2f95
- [AMDGPU] Use a wrapper multiclass for buffer atomic intrinsic patterns. NFC · 561af89f
  Abinav Puthan Purayil authored Apr 22, 2022
  
  561af89f
- Reapply [SimplifyCFG] Handle branch on same condition in pred more directly · 993b166d
  Nikita Popov authored Apr 20, 2022
  993b166d
- Reapply [SimplifyCFG] Make FoldCondBranchOnPHI more amenable to extension (NFCI) · df18e375
  Nikita Popov authored Apr 20, 2022
  df18e375
- [RISCV] Update test from SEW to Log2SEW · 9687ca97
  Fraser Cormack authored Apr 22, 2022
  9687ca97
- [AMDGPU] Rename the FlatSignedIntrPat multiclass to FlatSignedAtomicIntrPat. NFC · 272a8768
  Abinav Puthan Purayil authored Apr 22, 2022
  
  272a8768
- [RISCV] Do not outline CFI instructions when they are needed in EH · 5c3ea078
  Pengcheng Wang authored Apr 22, 2022
  5c3ea078
- [RISCV] Precommit test for D122634 · 6ee890b7
  Pengcheng Wang authored Apr 22, 2022
  6ee890b7
- [AMDGPU] Remove no-ret atomic ops selection in the post-isel hook · 2147b6c8
  Abinav Puthan Purayil authored Apr 19, 2022
  2147b6c8
- [AMDGPU] Remove atomic pattern args in FLAT_[Global_]Atomic_Pseudo defs · 165ae727
  Abinav Puthan Purayil authored Apr 19, 2022
  165ae727
- [AMDGPU] Select no-return DS_PK_ADD_F16 in tblgen · f935908d
  Abinav Puthan Purayil authored Apr 09, 2022
  f935908d
- [AMDGPU] Select no-return atomic intrinsics in tblgen · 45ca9433
  Abinav Puthan Purayil authored Apr 08, 2022
  45ca9433