Commits · e805b16e3dde4bc56b79f14f52761427014fd7c7 · Roger Ferrer / llvm-epi · GitLab

Dec 20, 2011
- Fix up the CMake build for the new files added in r146960, they're · e805b16e
  Chandler Carruth authored Dec 20, 2011
  e805b16e
- Revert pragma clang suppressions that confuse GCC. (I'll worry about how to... · 5ca16b10
  David Blaikie authored Dec 20, 2011
  5ca16b10
- Add a few lines to the release notes: · 1a0ae42d
  Nadav Rotem authored Dec 20, 2011
  1a0ae42d
- Unweaken vtables as per http://llvm.org/docs/CodingStandards.html#ll_virtual_anch · a379b181
  David Blaikie authored Dec 20, 2011
  a379b181
- Unit test for r146950: LSR postinc expansion, PR11571. · a34a8c45
  Andrew Trick authored Dec 20, 2011
  a34a8c45
- LSR: Fix another corner case in expansion of postinc users. · b9aa26f8
  Andrew Trick authored Dec 20, 2011
  b9aa26f8
- Mark ARM eh_sjlj_dispatchsetup as clobbering all registers. Radar 10567930. · 75f12cc3
  Bob Wilson authored Dec 20, 2011
  75f12cc3
- fix typo · 00723591
  Chris Lattner authored Dec 20, 2011
  00723591
- Add a line to ReleaseNotes for half float. · 948ec427
  Dan Gohman authored Dec 20, 2011
  948ec427
- ARM assembly shifts by zero should be plain 'mov' instructions. · e2ca9e5b
  Jim Grosbach authored Dec 20, 2011
  e2ca9e5b
- Now that PR11464 is fixed, reapply the patch to fix PR11464, · 9eb3f004
  Chris Lattner authored Dec 20, 2011
  9eb3f004
- fix PR11464 by preventing the linker from mapping two different struct types... · 5e3bd972
  Chris Lattner authored Dec 20, 2011
  5e3bd972
- add a method to improve compatibility with SmallVector. · 55619074
  Chris Lattner authored Dec 20, 2011
  55619074
- Add basic generic CodeGen support for half. · 94580ab3
  Dan Gohman authored Dec 20, 2011
  94580ab3
- ARM NEON assembly aliases for VMOV<-->VMVN for i32 immediates. · 045b6c71
  Jim Grosbach authored Dec 19, 2011
  045b6c71
- Move tests to FileCheck. · 3bfaefe9
  Evan Cheng authored Dec 19, 2011
  3bfaefe9
- ARM assembly parsing and encoding support for LDRD(label). · 8648c101
  Jim Grosbach authored Dec 19, 2011
  8648c101
Dec 19, 2011
- Add a if-conversion optimization that allows 'true' side of a diamond to be · 4266a793
  Evan Cheng authored Dec 19, 2011
  4266a793
- Add "using" to silence warnings. · 6dbc17df
  Eli Friedman authored Dec 19, 2011
  6dbc17df
- Add a test case for r146900. · 37c45db1
  Akira Hatanaka authored Dec 19, 2011
  37c45db1
- Add patterns for matching immediates whose lower 16-bit is cleared. These · db47e0c4
  Akira Hatanaka authored Dec 19, 2011
  db47e0c4
- Attempt to fix PR11607 by shuffling around which class defines which methods. · 5bb6826f
  Eli Friedman authored Dec 19, 2011
  5bb6826f
- Tidy up. Simplify logic. No functional change intended. · 9e1d369e
  Akira Hatanaka authored Dec 19, 2011
  9e1d369e
- ARM NEON two-operand aliases for VPADD. · 64f4de29
  Jim Grosbach authored Dec 19, 2011
  64f4de29
- Remove definitions of double word shift plus 32 instructions. Assembler or · 2a232d81
  Akira Hatanaka authored Dec 19, 2011
  2a232d81
- ARM VFP pre-UAL mnemonic aliases for fmul[sd]. · e16acacc
  Jim Grosbach authored Dec 19, 2011
  e16acacc
- Remove unused predicate. · c4db30e3
  Akira Hatanaka authored Dec 19, 2011
  c4db30e3
- Remove the restriction on the first operand of the add node in SelectAddr. · 3c9f3363
  Akira Hatanaka authored Dec 19, 2011
  3c9f3363
- ARM VFP pre-UAL mnemonic aliases for fcpy[sd] and fdiv[sd]. · 92a939ae
  Jim Grosbach authored Dec 19, 2011
  92a939ae
- ARM NEON implied destination aliases for VMAX/VMIN. · 9ae4fc03
  Jim Grosbach authored Dec 19, 2011
  9ae4fc03
- ARM NEON relax parse time diagnostics for alignment specifiers. · cef98cdd
  Jim Grosbach authored Dec 19, 2011
  cef98cdd
- Tidy up. · a7d24216
  Jim Grosbach authored Dec 19, 2011
  a7d24216
- Remove a register class that can just as well be synthesized. · 24159e34
  Jakob Stoklund Olesen authored Dec 19, 2011
  24159e34
- Handle sub-register operands in recomputeRegClass(). · 8f9c6c4a
  Jakob Stoklund Olesen authored Dec 19, 2011
  8f9c6c4a
- Emit a getMatchingSuperRegClass() implementation for every target. · c7b437ae
  Jakob Stoklund Olesen authored Dec 19, 2011
  c7b437ae
- Synthesize register classes for TRI::getMatchingSuperRegClass(). · b92f557c
  Jakob Stoklund Olesen authored Dec 19, 2011
  b92f557c
- Allow for benchmarking more than 4GB of memory · 7582bbc6
  Manuel Klimek authored Dec 19, 2011
  7582bbc6
- Adds a flag to allow specifying the memory limitations of the JSON benchmark. · 51945952
  Manuel Klimek authored Dec 19, 2011
  51945952
Dec 18, 2011
- - Use getExitingBlock instead of getExitingBlocks. · 1b1d523d
  Jakub Staszak authored Dec 18, 2011
  1b1d523d
- Another variadics tweak. · 1b54835a
  Benjamin Kramer authored Dec 18, 2011
  1b54835a