Commits · e980913831c1dfe5ce443a0b4f7a551c992133b8 · Roger Ferrer / llvm-epi · GitLab

Jul 29, 2020
- [Tests] Split a file for ease of update · e9809138
  Philip Reames authored Jul 29, 2020
  
  e9809138
- [AMDGPU] prefer non-mfma in post-RA schedule · 13b63be4
  Stanislav Mekhanoshin authored Jul 29, 2020
  13b63be4
- [PowerPC] Add options to control paired vector memops support · 7aaa8562
  Baptiste Saleil authored Jul 28, 2020
  7aaa8562
- [DFSan] Add efficient fast16labels instrumentation mode. · e2d0b44a
  Matt Morehouse authored Jul 29, 2020
  e2d0b44a
- [GlobalISel] Add G_INTRINSIC_LRINT and translate from llvm.lrint · 0c0e3606
  Amara Emerson authored Jul 24, 2020
  0c0e3606
- [AArch64][GlobalISel] Selection support for vector DUP[X]lane instructions. · d8ba6222
  Amara Emerson authored Jul 29, 2020
  d8ba6222
- AMDGPU/GlobalISel: Handle llvm.amdgcn.reloc.constant · 59fac51f
  Matt Arsenault authored Jul 21, 2020
  
  59fac51f
- GlobalISel: Implement lower for G_EXTRACT_VECTOR_ELT · 0b7de796
  Matt Arsenault authored Jul 26, 2020
  0b7de796
- [AArch64][GlobalISel] Select XRO addressing mode with wide immediates · 7ff95755
  Jessica Paquette authored Jul 28, 2020
  7ff95755
- AMDGPU: Relax restriction on folding immediates into physregs · 766cb615
  Matt Arsenault authored Jul 19, 2020
  766cb615
- [WebAssembly] Fix getBottom for loops · 276f9e8c
  Heejin Ahn authored Jul 29, 2020
  276f9e8c
- [PGO] Remove insignificant function hash values from some tests. · cd890944
  Hiroshi Yamauchi authored Jul 29, 2020
  cd890944
- [X86] Add custom lowering for llvm.roundeven with sse4.1. · c4823b24
  Craig Topper authored Jul 29, 2020
  c4823b24
- [LV] Add abs/smin/smax/umin/umax intrinsics to isTriviallyVectorizable · 3efc978b
  Craig Topper authored Jul 29, 2020
  3efc978b
- [DFSan][NewPM] Port DataFlowSanitizer to NewPM · 71d0a2b8
  Arthur Eubanks authored Jul 27, 2020
  71d0a2b8
- [DAG][AMDGPU][X86] Add SimplifyMultipleUseDemandedBits handling for... · fdc90277
  Simon Pilgrim authored Jul 29, 2020
  fdc90277
- [SimplifyCFG][LoopRotate] SimplifyCFG: disable common instruction hoisting by... · 1d51dc38
  Roman Lebedev authored Jul 29, 2020
  1d51dc38
- [PowerPC] Set v1i128 to expand for SETCC to avoid crash · 802c0430
  Kang Zhang authored Jul 29, 2020
  802c0430
- [Statepoint] When using the tied def lowering, unconditionally use vregs [almost NFC] · 31342eb6
  Philip Reames authored Jul 29, 2020
  31342eb6
- [NewPM][Attributor] Pin tests with -attributor to legacy PM · 4a10029d
  Arthur Eubanks authored Jul 28, 2020
  4a10029d
- [InstSimplify] allow partial undef constants for vector min/max folds · 3e8534fb
  Sanjay Patel authored Jul 29, 2020
  
  3e8534fb
- [InstSimplify] fold integer min/max intrinsic with same args · 3c20ede1
  Sanjay Patel authored Jul 29, 2020
  
  3c20ede1
- [MachineVerifier] Handle the PHI node for verifyLiveVariables() · a4ade9ed
  Kang Zhang authored Jul 29, 2020
  a4ade9ed
- AMDGPU: Account for the size of LDS globals used through constant · d42c7b22
  Matt Arsenault authored Jul 17, 2020
  d42c7b22
- [SVE] Don't consider scalable vector types in SLPVectorizerPass::vectorizeChainsInBlock · 9ad7c980
  David Sherwood authored Jul 10, 2020
  9ad7c980
- [MachineCopyPropagation] BackwardPropagatableCopy: add check for hasOverlappingMultipleDef · 6a05c6bf
  Simon Wallis authored Jul 29, 2020
  6a05c6bf
- [DWARFYAML] Make the field names consistent with the DWARF spec. NFC. · bfa14037
  Xing GUO authored Jul 29, 2020
  bfa14037
- [ConstantFolding] fold integer min/max intrinsics · 9ee7d712
  Sanjay Patel authored Jul 29, 2020
  9ee7d712
- [ConstantFolding] add tests for integer min/max intrinsics; NFC · 9f958958
  Sanjay Patel authored Jul 29, 2020
  
  9f958958
- [CostModel][X86] Add SSE costs for SMAX/SMIN/UMAX/UMIN intrinsics · d1abca18
  Simon Pilgrim authored Jul 29, 2020
  
  d1abca18
- [InstSimplify] add tests for expandCommutativeBinOp; NFC · 672df0fc
  Juneyoung Lee authored Jul 29, 2020
  
  672df0fc
- [ConstantFolding] update test checks FP min/max intrinsics · 8c3262a7
  Sanjay Patel authored Jul 29, 2020
  8c3262a7
- [CostModel][X86] Add SSE costs for ABS intrinsics · 0a0f2825
  Simon Pilgrim authored Jul 29, 2020
  
  0a0f2825
- [ARM] Tune getCastInstrCost for extending masked loads and truncating masked stores · 9ddb2896
  David Green authored Jul 29, 2020
  9ddb2896
- [SVE][CodeGen] Add simple integer add tests for SVE tuple types · 20787717
  David Sherwood authored Jul 16, 2020
  20787717
- [ARM] Optimize immediate selection · 85342c27
  Sjoerd Meijer authored Jul 29, 2020
  85342c27
- AMDGPU: Make saturating add/sub legal for DAG path · c230965c
  Matt Arsenault authored Jul 13, 2020
  
  c230965c
- AMDGPU/GlobalISel: Select llvm.amdgcn.global.atomic.csub · cdd45d5f
  Matt Arsenault authored Jul 21, 2020
  cdd45d5f
- [SVE] Add checks for no warnings in CodeGen/AArch64/sve-sext-zext.ll · f43b5c7a
  David Sherwood authored Jul 03, 2020
  f43b5c7a
- [NewGVN] Require asserts for crashing tests. · 2aa2c40d
  Florian Hahn authored Jul 29, 2020
  2aa2c40d