Commits · ea0237205990c6652929331cf07702add46f377d · Roger Ferrer / llvm-epi · GitLab

Aug 12, 2016
- [BranchFolding] Restrict tail merging loop blocks after MBP · ea023720
  Haicheng Wu authored Aug 12, 2016
  ea023720
- X86-FMA3: Implemented commute transformation for EVEX/AVX512 FMA3 opcodes. · 6daefcf6
  Vyacheslav Klochkov authored Aug 11, 2016
  6daefcf6
Aug 11, 2016
- GlobalISel: support 'null' constant in translation. · 8e0c53a0
  Tim Northover authored Aug 11, 2016
  8e0c53a0
- [Hexagon] Allow non-returning calls in hardware loops · 1b689da0
  Krzysztof Parzyszek authored Aug 11, 2016
  1b689da0
- Remove empty file left by partial reversion. · da6f5f2d
  Tim Northover authored Aug 11, 2016
  da6f5f2d
- GlobalISel: add translation support for shift operations. · 30e67ce7
  Tim Northover authored Aug 11, 2016
  30e67ce7
- GlobalISel: support zext & sext during translation phase. · f1f7bf12
  Tim Northover authored Aug 11, 2016
  f1f7bf12
- AMDGPU : Add intrinsic for instruction v_cvt_pk_u8_f32 · 70cda075
  Wei Ding authored Aug 11, 2016
  70cda075
- Revert rL278384 which caused several buildbot failures (like check failures in CodeGen/X86/clz.ll). · 3ab58160
  Wei Mi authored Aug 11, 2016
  3ab58160
- Remove the restriction that MachineSinking is now stopped by "insert_subreg, · ec19b351
  Wei Mi authored Aug 11, 2016
  ec19b351
- If-conversion incorrectly calculates liveness of redefined registers · a003b763
  Krzysztof Parzyszek authored Aug 11, 2016
  a003b763
- [Hexagon] Skip byval arguments when checking parameter attributes · 60f0b514
  Krzysztof Parzyszek authored Aug 11, 2016
  60f0b514
- Improve virtual register handling when computing debug information · 6ba19659
  Dominic Chen authored Aug 11, 2016
  6ba19659
- Make TwoAddressInstructionPass::rescheduleMIBelowKill subreg-aware · e36d7716
  Michael Kuperstein authored Aug 11, 2016
  e36d7716
- AMDGPU: Fix crashes on memory functions · 56684d45
  Matt Arsenault authored Aug 11, 2016
  56684d45
- AMDGPU : Fix SAD related instruction LIT tests function atttibute issues. · d3344378
  Wei Ding authored Aug 11, 2016
  d3344378
- AMDGPU : Add LLVM intrinsics for SAD related instructions. · 34e17535
  Wei Ding authored Aug 11, 2016
  34e17535
- GlobalISel: clear vreg mapping after translating each function · 0d51044b
  Tim Northover authored Aug 11, 2016
  0d51044b
- [AVX512] Fix extractelement i1 lowering. · a77b14d0
  Igor Breger authored Aug 11, 2016
  a77b14d0
- Avoid false dependencies of undef machine operands · 88f0c31f
  Marina Yatsina authored Aug 11, 2016
  88f0c31f
- [AVX-512] Promote 512-bit integer loads to v8i64 similar to what is done for... · a78b768e
  Craig Topper authored Aug 11, 2016
  a78b768e
- [AVX-512] Add patterns to allow EVEX encoded stores of... · 14aa2665
  Craig Topper authored Aug 11, 2016
  14aa2665
- [AVX-512] Fix the 128-bit and 256-bit nontemporal load patterns with elements... · 3563d0f6
  Craig Topper authored Aug 11, 2016
  3563d0f6
- GlobalISel: support same ConstantExprs as Instructions. · 357f1be2
  Tim Northover authored Aug 10, 2016
  357f1be2
- GlobalISel: add tests forgotten in r278293. · 2ff5935a
  Tim Northover authored Aug 10, 2016
  2ff5935a
Aug 10, 2016
- AMDGPU/SI: Implement amdgcn image intrinsics with sampler · fb9c3818
  Changpeng Fang authored Aug 10, 2016
  fb9c3818
- Codegen: Don't tail-duplicate blocks with un-analyzable fallthrough. · 81d32846
  Kyle Butt authored Aug 10, 2016
  81d32846
- CodeGen: If Convert blocks that would form a diamond when tail-merged. · e1c931b1
  Kyle Butt authored Aug 10, 2016
  e1c931b1
- AMDGPU: Change insertion point of si_mask_branch · 57431c96
  Matt Arsenault authored Aug 10, 2016
  57431c96
- [x86, AVX] allow FP vector select folding to bitwise logic ops (PR28895) · 5ccc85fe
  Sanjay Patel authored Aug 10, 2016
  5ccc85fe
- LiveIntervalAnalysis: fix a crash in repairOldRegInRange · 02d78417
  Nicolai Haehnle authored Aug 10, 2016
  02d78417
- Codegen: Tail Merge: Be less aggressive with special cases. · 71b1ca1b
  Kyle Butt authored Aug 10, 2016
  71b1ca1b
- [Hexagon] Simplify the SplitConst32/64 pass · 0bbad0fc
  Krzysztof Parzyszek authored Aug 10, 2016
  0bbad0fc
- [Hexagon] Add extra patterns for single-precision min/max instructions · 3b946c90
  Krzysztof Parzyszek authored Aug 10, 2016
  3b946c90
- GlobalISel: avoid inserting redundant COPYs for bitcasts. · 7552ef5a
  Tim Northover authored Aug 10, 2016
  7552ef5a
- [Hexagon] Use integer instructions for floating point immediates · a3386501
  Krzysztof Parzyszek authored Aug 10, 2016
  a3386501
- [X86][XOP] Tweak vpermil2pd test to stop it being combined away · b204f030
  Simon Pilgrim authored Aug 10, 2016
  b204f030
- [X86][SSE] Regenerate vector shift lowering tests · f1f55198
  Simon Pilgrim authored Aug 10, 2016
  f1f55198
- use different comparison predicates for better test coverage · 2c677a93
  Sanjay Patel authored Aug 10, 2016
  2c677a93
- [X86][SSE] Add support for combining target shuffles to MOVSS/MOVSD · ac8fa6c2
  Simon Pilgrim authored Aug 10, 2016
  ac8fa6c2