Commits · eb88badff96dacef8fce3f003dec34c2ef6900bf · Roger Ferrer / llvm-epi · GitLab

Jun 13, 2019
- [ARM] Set up infrastructure for MVE vector instructions. · 286e1d2c
  Simon Tatham authored Jun 13, 2019
  286e1d2c
- [AMDGPU][MC] Enabled constant expressions as operands of s_getreg/s_setreg · 1fca3b19
  Dmitry Preobrazhensky authored Jun 13, 2019
  1fca3b19
Jun 12, 2019
- [AMDGPU] more gfx1010 tests. NFC. · 000f9cc6
  Stanislav Mekhanoshin authored Jun 12, 2019
  000f9cc6
- [AMDGPU] gfx1010 dpp16 and dpp8 · 245b5ba3
  Stanislav Mekhanoshin authored Jun 12, 2019
  245b5ba3
- [Mips] Add s.d instruction alias for Mips1 · efc0d1a2
  Simon Atanasyan authored Jun 12, 2019
  efc0d1a2
Jun 11, 2019
- [ARM] Fix a typo in the test from r363039 · b37ccc5f
  Ilya Biryukov authored Jun 11, 2019
  b37ccc5f
- [ARM] First MVE instructions: scalar shifts. · 7bd5c55c
  Mikhail Maltsev authored Jun 11, 2019
  7bd5c55c
- [ARM] Add the non-MVE instructions in Arm v8.1-M. · 8c865cac
  Simon Tatham authored Jun 11, 2019
  8c865cac
Jun 10, 2019
- Revert rL362953 and its followup rL362955. · 67065c5c
  Simon Tatham authored Jun 10, 2019
  67065c5c
- [ARM] Add the non-MVE instructions in Arm v8.1-M. · 42078d41
  Simon Tatham authored Jun 10, 2019
  42078d41
- [ARM] Add the non-MVE instructions in Arm v8.1-M. · baeea919
  Simon Tatham authored Jun 10, 2019
  baeea919
- [ARM] Disallow PC, and optionally SP, in VMOVRH and VMOVHR. · b87669f1
  Simon Tatham authored Jun 10, 2019
  b87669f1
Jun 07, 2019
- [AArch64][AsmParser] error on unexpected SVE predicate type suffix · 1f0d2512
  Cullen Rhodes authored Jun 07, 2019
  1f0d2512
- [AArch64][AsmParser] Provide better diagnostics for SVE predicates · f7305484
  Cullen Rhodes authored Jun 07, 2019
  f7305484
- [MC][ELF] Don't create relocations with section symbols for STB_LOCAL ifunc · c841b9ab
  Fangrui Song authored Jun 07, 2019
  c841b9ab
Jun 04, 2019
- [ARM] Turn some undefined encoding bits into 0s. · ac024455
  Simon Tatham authored Jun 04, 2019
  ac024455
Jun 03, 2019
- [AMDGPU][MC] Added support of SCC, VCCZ and EXECZ operands · 9111f35f
  Dmitry Preobrazhensky authored Jun 03, 2019
  9111f35f
- [AArch64][SVE2] Add CPU and arch directive tests · 3901dd3e
  Cullen Rhodes authored Jun 03, 2019
  3901dd3e
Jun 01, 2019
- Extend the DWARFExpression address handling to support 16-bit addresses · 038e3b9f
  Dylan McKay authored Jun 01, 2019
  038e3b9f
- [codeview] Revert inline line table change of r362264 · eddd6c25
  Reid Kleckner authored May 31, 2019
  eddd6c25
May 31, 2019
- [codeview] Fix inline line table accuracy for discontiguous segments · e98cf5fe
  Reid Kleckner authored May 31, 2019
  e98cf5fe
- [AArch64][SVE2] Asm: support WHILE instructions · 0fc3a073
  Cullen Rhodes authored May 31, 2019
  0fc3a073
- [AArch64][SVE2] Asm: support TBL/TBX instructions · 087d1337
  Cullen Rhodes authored May 31, 2019
  087d1337
- [AArch64][SVE2] Asm: support SVE2 store instructions · 2e870011
  Cullen Rhodes authored May 31, 2019
  2e870011
- [X86] Add VP2INTERSECT instructions · 2e67d0c8
  Pengfei Wang authored May 31, 2019
  2e67d0c8
May 30, 2019
- [ARM] Introduce separate features for FP registers · 7eb95d67
  Sjoerd Meijer authored May 30, 2019
  7eb95d67
- [AArch64][SVE2] Asm: support SVE2 vector splice (constructive) · 7fad4289
  Cullen Rhodes authored May 30, 2019
  7fad4289
- [AArch64][SVE2] Asm: support SVE2 load instructions · ebe23041
  Cullen Rhodes authored May 30, 2019
  ebe23041
- [AArch64][SVE2] Asm: support FCVTX/FLOGB instructions · 455c529f
  Cullen Rhodes authored May 30, 2019
  455c529f
- [AArch64][SVE2] Asm: add ext (immediate offset, constructive) instruction · 028413f5
  Cullen Rhodes authored May 30, 2019
  028413f5
- [X86] Add ENQCMD instructions · 1f67d942
  Pengfei Wang authored May 30, 2019
  1f67d942
May 29, 2019
- [llvm-pdbutil] Dump inline call site line table annotations · 86bad3f9
  Reid Kleckner authored May 29, 2019
  86bad3f9
- [AArch64][SVE2] Asm: support SVE Bitwise Logical - Unpredicated Group · 6c04ef3d
  Cullen Rhodes authored May 29, 2019
  6c04ef3d
- [AArch64][SVE2] Asm: support Floating Point Widening Multiply-Add · 75dfbdc2
  Cullen Rhodes authored May 29, 2019
  75dfbdc2
- [AArch64][SVE2] Asm: support SVE2 Floating Point Pairwise Group · 4f58ad4e
  Cullen Rhodes authored May 29, 2019
  4f58ad4e
- Add IR support, ELF section and user documentation for partitioning feature. · 31fda09b
  Peter Collingbourne authored May 29, 2019
  31fda09b
- [X86] Fix x86-64 call *foo@tlsdesc(%rax) and support R_386_TLSGOTDESC R_386_TLS_DESC_CALL · 656afe37
  Fangrui Song authored May 29, 2019
  656afe37
May 28, 2019
- [ARM] Replace fp-only-sp and d16 with fp64 and d32. · 760df47b
  Simon Tatham authored May 28, 2019
  760df47b
- [AArch64][SVE2] Asm: support SVE2 Floating Point Convert Group · f57bd6bd
  Cullen Rhodes authored May 28, 2019
  f57bd6bd
- [AArch64][SVE2] Asm: support SVE2 Crypto Extensions Group · 8e91dd79
  Cullen Rhodes authored May 28, 2019
  8e91dd79