Commits · eb8d85e5db501d8b1c43e70ce2172102e0418754 · Roger Ferrer / llvm-epi · GitLab

Oct 03, 2019
- [X86] matchShuffleWithSHUFPD - use Zeroable element mask directly. NFCI. · eb8d85e5
  Simon Pilgrim authored Oct 03, 2019
  eb8d85e5
- AMDGPU/GlobalISel: Handle RegBankSelect of G_INSERT_VECTOR_ELT · ed77b274
  Matt Arsenault authored Oct 03, 2019
  ed77b274
- AMDGPU/GlobalISel: Split 64-bit vector extracts during RegBankSelect · 233ff982
  Matt Arsenault authored Oct 03, 2019
  233ff982
- AMDGPU/GlobalISel: Allow VGPR to index SGPR register · 56271fe1
  Matt Arsenault authored Oct 03, 2019
  56271fe1
- AMDGPU/GlobalISel: Fix mutationIsSane assert v8s8 and · 3d23e58d
  Matt Arsenault authored Oct 03, 2019
  3d23e58d
- AMDGPU/SILoadStoreOptimizer: Optimize scanning for mergeable instructions · e6f51713
  Tom Stellard authored Oct 03, 2019
  e6f51713
- [BPF] Handle offset reloc endpoint ending in the middle of chain properly · 02ac7509
  Yonghong Song authored Oct 03, 2019
  02ac7509
- Revert "[Alignment][NFC] Allow constexpr Align" · d1f23bd2
  Guillaume Chatelet authored Oct 03, 2019
  d1f23bd2
- [RISCV] Add obsolete aliases of fscsr, frcsr (fssr, frsr) · f5177a7d
  Edward Jones authored Oct 03, 2019
  f5177a7d
- [AArch64][SVE] Adding patterns for floating point SVE add instructions. · f21dbcca
  Ehsan Amiri authored Oct 03, 2019
  f21dbcca
- [mips] Push `fixup_Mips_LO16` fixup for `jialc` and `jic` instructions · f6551ddf
  Simon Atanasyan authored Oct 03, 2019
  f6551ddf
- [AArch64] Static (de)allocation of SVE stack objects. · 4f99b6f0
  Sander de Smalen authored Oct 03, 2019
  4f99b6f0
- Fix uninitialized variable warning. NFCI · 44bc1186
  Simon Pilgrim authored Oct 03, 2019
  44bc1186
- Fix uninitialized variable warning. NFCI · b327dc19
  Simon Pilgrim authored Oct 03, 2019
  b327dc19
- [Alignment][NFC] Allow constexpr Align · b3af236f
  Guillaume Chatelet authored Oct 03, 2019
  b3af236f
- AMDGPU/GlobalISel: Don't re-get subtarget · efb5a24a
  Matt Arsenault authored Oct 03, 2019
  efb5a24a
- AMDGPU/GlobalISel: Expand G_BITCAST legality · 1c135a39
  Matt Arsenault authored Oct 03, 2019
  1c135a39
- [X86] Add DAG combine to turn (bitcast (vbroadcast_load)) into just a... · eb420aa3
  Craig Topper authored Oct 03, 2019
  eb420aa3
- [X86] Add broadcast load folding patterns to NoVLX... · f849f414
  Craig Topper authored Oct 03, 2019
  f849f414
- [X86] Remove a couple redundant isel patterns that look to have been... · 241c72dd
  Craig Topper authored Oct 03, 2019
  241c72dd
- [gicombiner] Fix windows issue where single quotes in the command are passed through to tablegen · 603e9894
  Daniel Sanders authored Oct 02, 2019
  603e9894
- [AMDGPU] Fix illegal agpr use by VALU · 1384c3a5
  Stanislav Mekhanoshin authored Oct 02, 2019
  1384c3a5
Oct 02, 2019
- [gicombiner] Add the boring boilerplate for the declarative combiner · 505d7f31
  Daniel Sanders authored Oct 02, 2019
  505d7f31
- [PowerPC] Fix SH field overflow issue · c7be0679
  Yi-Hong Lyu authored Oct 02, 2019
  c7be0679
- [ARM] Make helpers static. NFC. · 12e915b3
  Benjamin Kramer authored Oct 02, 2019
  12e915b3
- [X86] Rewrite to the vXi1 subvector insertion code to not rely on the value of... · 74c7d6be
  Craig Topper authored Oct 02, 2019
  74c7d6be
- [WebAssembly] Error when using wasm64 for ISel · 5b74c39d
  Thomas Lively authored Oct 02, 2019
  5b74c39d
- [AMDGPU] Extend buffer intrinsics with swizzling · 265e94e6
  Piotr Sobczak authored Oct 02, 2019
  265e94e6
- [AArch64][SVE] Implement int_aarch64_sve_cnt intrinsic · 822b2989
  Kerry McLaughlin authored Oct 02, 2019
  822b2989
- [ARM] Identity shuffles are legal · c9b5ab8b
  David Green authored Oct 02, 2019
  c9b5ab8b
- [AMDGPU] Make printf lowering faster when there are no printfs · dafda610
  Jay Foad authored Oct 02, 2019
  dafda610
- [X86] Add broadcast load folding patterns to the NoVLX compare patterns. · 8d6a863b
  Craig Topper authored Oct 02, 2019
  8d6a863b
- AMDGPU/GlobalISel: Use getIntrinsicID helper · 86f864da
  Matt Arsenault authored Oct 02, 2019
  86f864da
- AMDGPU/GlobalISel: Assume VGPR for G_FRAME_INDEX · cdfe5efe
  Matt Arsenault authored Oct 02, 2019
  cdfe5efe
- AMDGPU/GlobalISel: Private loads always use VGPRs · bfce0c26
  Matt Arsenault authored Oct 02, 2019
  bfce0c26
- AMDGPU/GlobalISel: Legalize 1024-bit G_BUILD_VECTOR · 05aa8a73
  Matt Arsenault authored Oct 02, 2019
  05aa8a73
- AMDGPU/GlobalISel: Fix RegBankSelect for 1024-bit values · 3a657afb
  Matt Arsenault authored Oct 02, 2019
  3a657afb
- [AMDGPU] separate accounting for agprs · 075bc48a
  Stanislav Mekhanoshin authored Oct 02, 2019
  075bc48a
- [X86] Add a DAG combine to shrink vXi64 gather/scatter indices that are... · 8c19925f
  Craig Topper authored Oct 01, 2019
  8c19925f
- AMDGPU: Fix an out of date assert in addressing FrameIndex · e4ee28d1
  Changpeng Fang authored Oct 01, 2019
  e4ee28d1