Commits · ec1ec1b41689151db24a81a98554b995df1839ab · Roger Ferrer / llvm-epi · GitLab

Mar 11, 2014
- ARM: enable tail call optimisation on Thumb 2 · ec1ec1b4
  Saleem Abdulrasool authored Mar 11, 2014
  ec1ec1b4
- IR: add a second ordering operand to cmpxhg for failure · e94a518a
  Tim Northover authored Mar 11, 2014
  e94a518a
- X86: Enable ISel of 16-bit MOVBE instructions. · c94d993a
  Jim Grosbach authored Mar 11, 2014
  c94d993a
- Fix undefined behavior in vector shift tests. · 532db699
  Matt Arsenault authored Mar 11, 2014
  532db699
Mar 10, 2014
- Followup to r203483 - add test. · d47a5c2d
  Eli Bendersky authored Mar 10, 2014
  d47a5c2d
- [mips] Implement NaCl sandboxing of loads, stores and SP changes: · 5fddf610
  Sasa Stankovic authored Mar 10, 2014
  5fddf610
- Fix regression with -O0 for mips . · 96b7402b
  Reed Kotler authored Mar 10, 2014
  96b7402b
- AArch64: fix LowerCONCAT_VECTORS for new CodeGen. · 2a661f3f
  Tim Northover authored Mar 10, 2014
  2a661f3f
Mar 09, 2014
- Revert r203230, "CodeGenPrep: sink extends of illegal types into use block." · 1783e1e9
  NAKAMURA Takumi authored Mar 09, 2014
  1783e1e9
- IR: Change inalloca's grammar a bit · c4ab61cb
  David Majnemer authored Mar 09, 2014
  c4ab61cb
Mar 08, 2014
- Update comment from r203315 based on review · 42030397
  Adam Nemet authored Mar 08, 2014
  42030397
- DebugInfo: further improvements to test following up on r203329 · 078278fe
  David Blaikie authored Mar 08, 2014
  078278fe
- DebugInfo: Fix test fallout from r203323 · f528f054
  David Blaikie authored Mar 08, 2014
  f528f054
- [DAGCombiner] Recognize another rotation idiom · 5117f5df
  Adam Nemet authored Mar 07, 2014
  5117f5df
- ISel: Make VSELECT selection terminate in cases where the condition type has to · d33e9429
  Arnold Schwaighofer authored Mar 07, 2014
  d33e9429
Mar 07, 2014
- Moved test file from test/MC/Mips to test/CodeGen/Mips. · 1e50b46b
  Sasa Stankovic authored Mar 07, 2014
  1e50b46b
- R600/SI: Using SGPRs is illegal for instructions that read carry-out from VCC · e28859f8
  Tom Stellard authored Mar 07, 2014
  e28859f8
- R600/SI: Custom lower i1 stores · 1c8788ef
  Tom Stellard authored Mar 07, 2014
  1c8788ef
- CodeGenPrep: sink extends of illegal types into use block. · ad3d81d3
  Tim Northover authored Mar 07, 2014
  ad3d81d3
- Replace PROLOG_LABEL with a new CFI_INSTRUCTION. · b1f25f1b
  Rafael Espindola authored Mar 07, 2014
  b1f25f1b
Mar 06, 2014
- Remove shouldEmitUsedDirectiveFor. · 3b30cb41
  Rafael Espindola authored Mar 06, 2014
  3b30cb41
- Convert test to FileCheck. · 123256a4
  Rafael Espindola authored Mar 06, 2014
  123256a4
- [X86] Teach the DAGCombiner how to fold a OR of two shufflevector nodes. · 6292a140
  Andrea Di Biagio authored Mar 06, 2014
  6292a140
- R600: Fix extloads from i8 / i16 to i64. · f9a995d6
  Matt Arsenault authored Mar 06, 2014
  f9a995d6
- R600/SI: Expand selects on vectors. · 9fe669c5
  Matt Arsenault authored Mar 06, 2014
  9fe669c5
- [XCore] Add support for the "m" inline asm constraint. · 47155af5
  Richard Osborne authored Mar 06, 2014
  47155af5
- [AArch64] This is a work in progress to provide a machine description · 86a8f720
  Chad Rosier authored Mar 06, 2014
  86a8f720
- Fixup PPC Darwin i1 argument handling · 7f908e8e
  Hal Finkel authored Mar 06, 2014
  7f908e8e
- When using CR bit registers on PPC32, handle the i1 vaarg case · 2a9d318e
  Hal Finkel authored Mar 06, 2014
  2a9d318e
Mar 05, 2014
- [Mips] Testcase typo fix. No functionality change. · 6b9cf961
  Jack Carter authored Mar 05, 2014
  6b9cf961
- With PPC CR bit registers, handle int_to_fp on older cores · 6a56b217
  Hal Finkel authored Mar 05, 2014
  6a56b217
- Always print the implicit .text at the start of an asm file. · 83770856
  Rafael Espindola authored Mar 05, 2014
  83770856
- Lower AVX v4i64->v4i32 truncate to one shuffle. · 791ae992
  Cameron McInally authored Mar 05, 2014
  791ae992
- ARM: Correctly align arguments after a byval struct is passed on the stack · d55e115b
  Oliver Stannard authored Mar 05, 2014
  d55e115b
- Make stackmap machineinstrs clobber the scratch regs too. · fbb278c5
  Andrew Trick authored Mar 05, 2014
  fbb278c5
- Check for dynamic allocas and inline asm that clobbers sp before building · acb842d5
  Hans Wennborg authored Mar 05, 2014
  acb842d5
Mar 04, 2014
- [XCore] Fix call of absolute address. · 1b5fc397
  Richard Osborne authored Mar 04, 2014
  1b5fc397
- [mips][msa] Correct the behaviour of the COPY_FW pseudo on lanes 2 and 3. · d920770a
  Daniel Sanders authored Mar 04, 2014
  d920770a
- Revert "[AArch64] This is a work in progress to provide a machine description" · 70cb2311
  Chad Rosier authored Mar 04, 2014
  70cb2311
- [AArch64] This is a work in progress to provide a machine description · fe452905
  Chad Rosier authored Mar 03, 2014
  fe452905