Commits · ec8236ead1487e6a2d4f55a594c1a0144407a6c6 · Roger Ferrer / llvm-epi · GitLab

May 16, 2018
- ARM: Remove unnecessary argument. NFCI. · ec8236ea
  Peter Collingbourne authored May 16, 2018
  ec8236ea
- ARM: Deduplicate code and remove unnecessary declaration. NFCI. · 76d463af
  Peter Collingbourne authored May 16, 2018
  76d463af
- [AMDGPU] Fix handling of void types in isLegalAddressingMode · 57d341c2
  Stanislav Mekhanoshin authored May 15, 2018
  57d341c2
May 15, 2018
- [AArch64] Improve single vector lane unscaled stores · 8d522d81
  Evandro Menezes authored May 15, 2018
  8d522d81
- Nios2: Unbreak build. · 28d4ddab
  Peter Collingbourne authored May 15, 2018
  28d4ddab
- [x86][eflags] Fix PR37431 by teaching the EFLAGS copy lowering to · 5ecd81aa
  Chandler Carruth authored May 15, 2018
  5ecd81aa
- AMDGPU: Fix v_dot{4, 8}* instruction encoding · f13c9969
  Konstantin Zhuravlyov authored May 15, 2018
  f13c9969
- AMDGPU/GlobalISel: Implement select() for G_FCONSTANT · e182b28a
  Tom Stellard authored May 15, 2018
  e182b28a
- AMDGPU: Add disasm tests for deep learning instructions + fix v_fmac_f32 disasm · 603a43fc
  Konstantin Zhuravlyov authored May 15, 2018
  603a43fc
- [X86] Split WriteCvtF2F into F32->F64 and F64->F32 scheduler classes · be9a2068
  Simon Pilgrim authored May 15, 2018
  be9a2068
- [Hexagon] Remove unused function from subtarget · db39bf40
  Krzysztof Parzyszek authored May 15, 2018
  db39bf40
- [Hexagon] Remove unused flag from subtarget and (non)corresponding test · 8c389bd3
  Krzysztof Parzyszek authored May 15, 2018
  8c389bd3
- [mips] Mark select instructions correctly · f40eb03c
  Simon Dardis authored May 15, 2018
  f40eb03c
- [X86] Split off F16C WriteCvtPH2PS/WriteCvtPS2PH scheduler classes · 891ebcdb
  Simon Pilgrim authored May 15, 2018
  891ebcdb
- [mips] Fix formatting of floating point conversion patterns · ce5d3d65
  Simon Dardis authored May 15, 2018
  ce5d3d65
- [mips] Add disassembly support for comparison instructions · aa6bdba0
  Simon Dardis authored May 15, 2018
  aa6bdba0
- [mips] Fix predicates of mfc1, mtc1 instructions · b79ecec2
  Simon Dardis authored May 15, 2018
  b79ecec2
- [X86] Improve unsigned saturation downconvert detection. · 243a3d56
  Artur Gainullin authored May 15, 2018
  243a3d56
- [RISCV] Define FeatureRelax and shouldForceRelocation for RISCV linker relaxation · 39694250
  Shiva Chen authored May 15, 2018
  39694250
May 14, 2018
- [ARM] Back up R4 and LR if calling the stack probe function · ace7ae93
  Martin Storsjö authored May 14, 2018
  ace7ae93
- [Hexagon] Add a target feature to control using small data section · 44e180ba
  Krzysztof Parzyszek authored May 14, 2018
  44e180ba
- [Hexagon] Add a target feature for generating new-value stores · f66f7612
  Krzysztof Parzyszek authored May 14, 2018
  f66f7612
- [Hexagon] Add a target feature for memop generation · 771f2422
  Krzysztof Parzyszek authored May 14, 2018
  771f2422
- [X86] Add NT load/store scheduler classes · 215ce4a1
  Simon Pilgrim authored May 14, 2018
  215ce4a1
- [X86] Remove and autoupgrade avx512.vbroadcast.ss/avx512.vbroadcast.sd intrinsics. · 53ceb480
  Craig Topper authored May 14, 2018
  53ceb480
- [X86][BtVer2] Fix MMX/YMM integer vector nt store schedules · 228d24a2
  Simon Pilgrim authored May 14, 2018
  228d24a2
- [Hexagon] Avoid predicate copies to integer registers from store-locked · 329c3e9a
  Krzysztof Parzyszek authored May 14, 2018
  329c3e9a
- [mips] Fix the predicates of round, ceiling, floor and trunc. · bb818b44
  Simon Dardis authored May 14, 2018
  bb818b44
- [NFC] [Power] Fix instruction format for xsrqpi · 421a5960
  Zaara Syeda authored May 14, 2018
  421a5960
- [AArch64] Improve single vector lane stores · 14fa2e4f
  Evandro Menezes authored May 14, 2018
  14fa2e4f
- Rename DEBUG macro to LLVM_DEBUG. · d34e60ca
  Nicola Zaghen authored May 14, 2018
  d34e60ca
- [AArch64][SVE] Extend parsing of Prefetch operation for SVE. · 93380371
  Sander de Smalen authored May 14, 2018
  93380371
- [mips] Correct the predicates of indexed floating point stores and loads. · fba03620
  Simon Dardis authored May 14, 2018
  fba03620
- [X86] Cleanup a multiclass that doesn't need as many parameters after recent intrinsic removals. · 266b7ae5
  Craig Topper authored May 14, 2018
  266b7ae5
- [X86] Remove and autoupgrade the cvtusi2sd intrinsic. Use uitofp+insertelement instead. · 0e71c6d5
  Craig Topper authored May 14, 2018
  0e71c6d5
- [X86] Add patterns for combining movss+uint_to_fp into the intrinsic instructions under AVX512. · 97e74b05
  Craig Topper authored May 13, 2018
  97e74b05
May 13, 2018
- [X86] Remove and autoupgrade masked vpermd/vpermps intrinsics. · 85906cf0
  Craig Topper authored May 13, 2018
  85906cf0
- AMDGPU: Rename OpenCL lowering pass to be R600 specific. · 432aaea6
  Matt Arsenault authored May 13, 2018
  432aaea6
- AMDGPU: Make undef legal for v2i16/v2f16 · dfb88dfe
  Matt Arsenault authored May 13, 2018
  dfb88dfe
- [X86] Add some load folding patterns for cvtsi2ss/sd into intrinsic instructions. · 38b713d4
  Craig Topper authored May 13, 2018
  38b713d4