Commits · ecd0c8a55760ee7a4c774eaea9606293bbafb5c7 · Roger Ferrer / llvm-epi · GitLab

Dec 16, 2010
- MC: Make TargetAsmBackend available to the AsmStreamer. · ecd0c8a5
  Daniel Dunbar authored Dec 16, 2010
  ecd0c8a5
- Delete an extra "Imm5 = ", caught by GCC's -Wsequence-point but not by Clang · e9afc740
  Matt Beaumont-Gay authored Dec 16, 2010
  e9afc740
- Remove fixup_arm_thumb_ldst. The code was never calling the "fixup" stuff for · 9613a09e
  Bill Wendling authored Dec 16, 2010
  9613a09e
- Add tSpill and tRestore to the opcodes to replace with tSTRi and tLDRi · 637813a2
  Bill Wendling authored Dec 16, 2010
  637813a2
- Add encodings for Thumb1 Spill and Restore pseudos. · f5b17c32
  Bill Wendling authored Dec 16, 2010
  f5b17c32
- Thumb1 had two patterns for the same load-from-constant-pool instruction. · bfef309d
  Jim Grosbach authored Dec 15, 2010
  bfef309d
- Don't handle -arm-long-calls in fast isel for now. · 347f4c32
  Eric Christopher authored Dec 15, 2010
  347f4c32
- If we're changing the frame register to a physical register other than SP, we · 7d3bde98
  Bill Wendling authored Dec 15, 2010
  7d3bde98
- Whitespace cleanups. · 6217ecd6
  Bill Wendling authored Dec 15, 2010
  6217ecd6
Dec 15, 2010
- Only rr forms of ADD*_DB are commutable. · be69d8e2
  Evan Cheng authored Dec 15, 2010
  be69d8e2
- Add Neon VCVT instructions for f32 <-> f16 conversions. · fa27a862
  Bob Wilson authored Dec 15, 2010
  fa27a862
- Lower the MBlaze target specific calling conventions for "interrupt_handler" · 0c558b20
  Wesley Peck authored Dec 15, 2010
  0c558b20
- Add some special purpose register definitions to the MBlaze backend and... · fdb174b6
  Wesley Peck authored Dec 15, 2010
  fdb174b6
- Tweak a few pseudo-inst pattern base classes. · 23477c2e
  Jim Grosbach authored Dec 15, 2010
  23477c2e
- The new t2LEApcrel* pseudo instructions need the size specified. · d42257ce
  Jim Grosbach authored Dec 15, 2010
  d42257ce
- Implement cleanups suggested by Daniel. · 622ad517
  Owen Anderson authored Dec 15, 2010
  622ad517
- Add fixups for Thumb LDR/STR instructions. · 03e7576d
  Bill Wendling authored Dec 15, 2010
  03e7576d
- add another overflow idiom · 5174921b
  Chris Lattner authored Dec 15, 2010
  5174921b
- add a note about overflow idiom recognition. · 2e339853
  Chris Lattner authored Dec 15, 2010
  2e339853
- add a shift/imul missed optimization · 27ecda1e
  Chris Lattner authored Dec 15, 2010
  27ecda1e
- add a note about a SPEC hack that gcc mainline does. · aded09f2
  Chris Lattner authored Dec 15, 2010
  aded09f2
- Reapply r121808 now that the missing patterns have been supplied. · 832a5daa
  Bill Wendling authored Dec 15, 2010
  832a5daa
- Add some missing patterns now that tLDRB and tLDRH are split into reg and · 1171e9e8
  Bill Wendling authored Dec 15, 2010
  1171e9e8
- Revert r121808 until I can fix the build. · 20480d26
  Bill Wendling authored Dec 15, 2010
  20480d26
- thumb adr fixup needs alignment just like the t2 version. · eda5177c
  Jim Grosbach authored Dec 14, 2010
  eda5177c
- Comments and cleaning. · 5ab38b59
  Bill Wendling authored Dec 14, 2010
  5ab38b59
- Make the ISel selections for LDR/STR the same as before the LDRr/LDRi split. In · 00adcd6e
  Bill Wendling authored Dec 14, 2010
  00adcd6e
Dec 14, 2010
- Add support for MC-ized encoding of tLEApcrel and tLEApcrelJT. rdar://8755755 · 509dc2a7
  Jim Grosbach authored Dec 14, 2010
  509dc2a7
- Fix comment. · 6ea30538
  Bill Wendling authored Dec 14, 2010
  6ea30538
- Multiclassify the LDR/STR encoding patterns. The only functionality difference · ce4f87b3
  Bill Wendling authored Dec 14, 2010
  ce4f87b3
- trailing whitespace · d96bd53d
  Jim Grosbach authored Dec 14, 2010
  d96bd53d
- Refactor a bit for legibility. · 8c1fabe3
  Jim Grosbach authored Dec 14, 2010
  8c1fabe3
- trailing whitespace. · 2fc65611
  Jim Grosbach authored Dec 14, 2010
  2fc65611
- Make sure to propagate the predicate operands for LEApcrel to ADR. · 96254146
  Jim Grosbach authored Dec 14, 2010
  96254146
- Fix a small bug (typo?) in the fixup for Thumb1 CBZ/CBNZ instructions. · f636a64b
  Owen Anderson authored Dec 14, 2010
  f636a64b
- Add TargetRegisterInfo::printReg() to pretty-print registers. · 2dd1ee5f
  Jakob Stoklund Olesen authored Dec 14, 2010
  2dd1ee5f
- MC/ARM: Fix-up fixup offset for fixup_arm_branch target specific fixup. · a9b9300b
  Daniel Dunbar authored Dec 14, 2010
  a9b9300b
- Trailing whitespace · e34793e9
  Jim Grosbach authored Dec 14, 2010
  e34793e9
- Use the integer scheduling intrinsic for integer loads and stores. · 6dd0c076
  Bill Wendling authored Dec 14, 2010
  6dd0c076
- The tLDR et al instructions were emitting either a reg/reg or reg/imm · 092a7bdf
  Bill Wendling authored Dec 14, 2010
  092a7bdf