Commits · ecd46edd613433154b3d0eeb25af27234f6f98eb · Roger Ferrer / llvm-epi · GitLab

Jan 31, 2022
- [UpdateTestChecks] Re-add --filter and --filter-out options · ecd46edd
  David Greene authored Jan 31, 2022
  ecd46edd
- [AArch64][SelectionDAG] CodeGen for Armv8.8/9.3 MOPS · 5aa08bf7
  tyb0807 authored Jan 19, 2022
  5aa08bf7
- [AArch64][GlobalISel] CodeGen for Armv8.8/9.3 MOPS · 78fd413c
  tyb0807 authored Jan 18, 2022
  78fd413c
- [mlgo][regalloc][test] Add comprehensive log output testing · afbc7bdf
  Mircea Trofin authored Jan 31, 2022
  
  afbc7bdf
- Revert "[WebAssembly] Refactor and fix emission of external IR global decls" · 3e230d15
  Sam Clegg authored Jan 31, 2022
  3e230d15
- [x86] add tests for binop of select with identity constant; NFC · 06fd721f
  Sanjay Patel authored Jan 31, 2022
  
  06fd721f
- [LV] Add additional complex first order recurrence test. · 02ee3fbf
  Florian Hahn authored Jan 31, 2022
  02ee3fbf
- [SVE] By using SEL when orring predicates we forgo the need for a PTRUE. · bcda4c48
  Paul Walker authored Jan 28, 2022
  bcda4c48
- [SLP]Alternate vectorization for cmp instructions. · afaaecc8
  Alexey Bataev authored Dec 16, 2021
  afaaecc8
- [SVE] Extend isel pattern coverage for INCP & DECP. · 804915f5
  Paul Walker authored Jan 30, 2022
  804915f5
- [AArch64] Bail out for float operands in SetCC optimization. · 23091f7d
  Florian Hahn authored Jan 31, 2022
  23091f7d
- Fix a fragment overflow problem when composing super-registers. · f85c6b79
  Adrian Prantl authored Jan 27, 2022
  f85c6b79
- [RISCV] Separate the Zfhmin and Zfh extensions. · aae947e8
  Craig Topper authored Jan 31, 2022
  aae947e8
- [InstCombine] add tests for potential mul demanded bits fold; NFC · d1dfa9f7
  Sanjay Patel authored Jan 31, 2022
  d1dfa9f7
- Revert "[Local] invertCondition: try modifying an existing ICmpInst" · 8faad296
  Jay Foad authored Jan 31, 2022
  8faad296
- [SVE] Fix TypeSize->uint64_t implicit conversion in visitAlloca() · 002b944d
  Kerry McLaughlin authored Jan 31, 2022
  002b944d
- [Analysis] Attribute noundef should not prevent tail call optimization · ae990a3c
  Dávid Bolvanský authored Jan 31, 2022
  ae990a3c
- [X86] combineAnd() - per-element simplification - call SimplifyDemandedBits... · 7ec8fc29
  Simon Pilgrim authored Jan 31, 2022
  7ec8fc29
- [DebugInfo][InstrRef] Don't fully propagate single assigned variables · c703d77a
  Jeremy Morse authored Jan 31, 2022
  c703d77a
- [DAG] SimplifyDemandedBits - mul(x,x) - if only demand bit[1] then fold to zero · 2d1390ef
  Simon Pilgrim authored Jan 31, 2022
  
  2d1390ef
- [X86] Limit mul(x,x) knownbits tests with not undef/poison check · 48f45f6b
  Simon Pilgrim authored Jan 31, 2022
  48f45f6b
- [AMDGPU] Add test for a problem with noclobber metadata · ae68b3a4
  Jay Foad authored Jan 28, 2022
  ae68b3a4
- [X86] Add mul(x,x) tests showing miscompile · ffd0e464
  Simon Pilgrim authored Jan 31, 2022
  ffd0e464
- [Local] invertCondition: try modifying an existing ICmpInst · a6b54dda
  Jay Foad authored Jan 28, 2022
  a6b54dda
- [WebAssembly] Refactor and fix emission of external IR global decls · 00bf4755
  Paulo Matos authored Jan 31, 2022
  00bf4755
- [AArch64] Fix costs of float vector compare/selects pairs. · 17ebd68a
  Florian Hahn authored Jan 31, 2022
  17ebd68a
- [Inline][Cloning] Reliably remove unreachable blocks during cloning (PR53206) · 4810051a
  Nikita Popov authored Jan 28, 2022
  4810051a
- [InstCombine] Generalize and-reduce pattern to handle `ne` case as well as `eq` · 70b3beb0
  Max Kazantsev authored Jan 31, 2022
  70b3beb0
- [RISCV] Add more pack and packw test case for Zbkb. NFC · 175145e3
  Craig Topper authored Jan 30, 2022
  175145e3
- [RISCV] Merge rv64zbkb-valid.s and rv64zbkb-only-valid.s. NFC · bb495810
  Craig Topper authored Jan 30, 2022
  bb495810
- [RISCV] Rename rv64-zbkb-valid.s to rv64zbkb-valid.s. NFC · 3931faa5
  Craig Topper authored Jan 30, 2022
  
  3931faa5
- [RISCV] Fix bad CHECK prefix in rv32zbkb-valid.s. · 491403c1
  Craig Topper authored Jan 30, 2022
  491403c1
Jan 30, 2022
- [RISCV] Custom lower brev8 intrinsic to RISCVISD::GREV. · e1075186
  Craig Topper authored Jan 30, 2022
  e1075186
- [X86] combineVectorTruncation - use PACKUSDW(BLENDW(X,0),BLENDW(Y,0)) for v8i32->v8i16 truncation · 156f83ad
  Simon Pilgrim authored Jan 30, 2022
  156f83ad
- [X86] Attempt to fold MOVMSK(CMPEQ(AND(X,C1),0)) -> MOVMSK(NOT(SHL(X,C2))) · 2cdbaca3
  Simon Pilgrim authored Jan 30, 2022
  2cdbaca3
- [X86] Add tests showing failure to fold MOVMSK(CMPEQ(AND(X,C1),0)) -> MOVMSK(NOT(SHL(X,C2))) · 4e3ba526
  Simon Pilgrim authored Jan 30, 2022
  4e3ba526
- [InstCombine] Do not combine atomic and non-atomic loads · 30ac5f9e
  Ricky Zhou authored Jan 30, 2022
  30ac5f9e
- [InstCombine] Add test reproducing PR51435 (NFC) · 2d283528
  Ricky Zhou authored Jan 30, 2022
  2d283528
- Revert "[InstCombine] Do not combine atomic and non-atomic loads" · 69b83548
  Sanjay Patel authored Jan 30, 2022
  69b83548
- [InstCombine] Do not combine atomic and non-atomic loads · a2bb7313
  Ricky Zhou authored Jan 30, 2022
  a2bb7313