Commits · ed975232bc929251dd1aeda5d609aa40b0372f5f · Roger Ferrer / llvm-epi · GitLab

Jan 20, 2012
- More dead code removal (using -Wunreachable-code) · 46a9f016
  David Blaikie authored Jan 20, 2012
  46a9f016
Jan 18, 2012
- Implement ARMBaseRegisterInfo::getCallPreservedMask(). · fdbb12b2
  Jakob Stoklund Olesen authored Jan 17, 2012
  fdbb12b2
Jan 05, 2012
- Reapply r146997, "Heed spill slot alignment on ARM." · d110e2a8
  Jakob Stoklund Olesen authored Jan 05, 2012
  d110e2a8
- Avoid reserving an ARM base pointer during register allocation. · 9cb477db
  Jakob Stoklund Olesen authored Jan 05, 2012
  9cb477db
Jan 03, 2012
- Revert r146997, "Heed spill slot alignment on ARM." · 1b7f2a76
  Jakob Stoklund Olesen authored Jan 03, 2012
  1b7f2a76
Dec 20, 2011
- Heed spill slot alignment on ARM. · b95c102c
  Jakob Stoklund Olesen authored Dec 20, 2011
  b95c102c
- ARM target code clean up. Check for iOS, not Darwin where it makes sense. · 68132d80
  Evan Cheng authored Dec 20, 2011
  68132d80
Dec 19, 2011
- Emit a getMatchingSuperRegClass() implementation for every target. · c7b437ae
  Jakob Stoklund Olesen authored Dec 19, 2011
  c7b437ae
Dec 02, 2011
- Move global variables in TargetMachine into new TargetOptions class. As an API · 50f02cb2
  Nick Lewycky authored Dec 02, 2011
  50f02cb2
Oct 20, 2011
- Revert 142337. Thumb1 still doesn't support dynamic stack realignment. :( · add38c12
  Chad Rosier authored Oct 20, 2011
  add38c12
Oct 18, 2011
- Add support for dynamic stack realignment when in thumb1 mode. · 0ffe593a
  Chad Rosier authored Oct 18, 2011
  0ffe593a
Oct 11, 2011
- Revert r141529. This is causing failures in the test-suite, like bigstack and ReedSolomon. Boo... · 265328ba
  Bill Wendling authored Oct 11, 2011
  265328ba
Oct 10, 2011
- When getting the number of bits necessary for addressing mode · ea662bb3
  Bill Wendling authored Oct 10, 2011
  ea662bb3
Oct 01, 2011
- Revert r140924 "Attempt to fix dynamic stack realignment for thumb1 functions." · a88cb23d
  Chad Rosier authored Oct 01, 2011
  a88cb23d
- Attempt to fix dynamic stack realignment for thumb1 functions. It is in fact · 21360a49
  Chad Rosier authored Oct 01, 2011
  21360a49
- Store sub-class lists as a bit vector. · 237dceff
  Jakob Stoklund Olesen authored Sep 30, 2011
  237dceff
Sep 13, 2011
- Tidy up a bit. · 50087ea1
  Jim Grosbach authored Sep 13, 2011
  50087ea1
Aug 30, 2011
- Change ARM / Thumb2 addc / adde and subc / sube modeling to use physical · e891654a
  Evan Cheng authored Aug 30, 2011
  e891654a
Aug 24, 2011
- Thumb1 ADD/SUB SP instructions are predicable in Thumb2 mode. · 1b8457a8
  Jim Grosbach authored Aug 24, 2011
  1b8457a8
Aug 12, 2011
- Silence a bunch (but not all) "variable written but not read" warnings · a41634e3
  Duncan Sands authored Aug 12, 2011
  a41634e3
Jul 21, 2011
- Sink ARMMCExpr and ARMAddressingModes into MC layer. First step to separate... · a20cde31
  Evan Cheng authored Jul 20, 2011
  a20cde31
Jul 19, 2011
- Move getInitialFrameState from TargetFrameInfo to MCAsmInfo (suggestions for · 67c033e6
  Evan Cheng authored Jul 18, 2011
  67c033e6
Jul 18, 2011
- Sink getDwarfRegNum, getLLVMRegNum, getSEHRegNum from TargetRegisterInfo down · d60fa58b
  Evan Cheng authored Jul 18, 2011
  d60fa58b
- Migrate LLVM and Clang to use the new makeArrayRef(...) functions where... · 717d7edd
  Frits van Bommel authored Jul 18, 2011
  717d7edd
Jul 14, 2011
- Next round of MC refactoring. This patch factor MC table instantiations, MC · bc153d49
  Evan Cheng authored Jul 14, 2011
  bc153d49
Jun 30, 2011
- Remove redundant Thumb2 ADD/SUB SP instruction definitions. · a8a8067d
  Jim Grosbach authored Jun 29, 2011
  a8a8067d
Jun 28, 2011
- Move CallFrameSetupOpcode and CallFrameDestroyOpcode to TargetInstrInfo. · 194c3dc0
  Evan Cheng authored Jun 28, 2011
  194c3dc0
- Hide more details in tablegen generated MCRegisterInfo ctor function. · 0beca53a
  Evan Cheng authored Jun 28, 2011
  0beca53a
- - Rename TargetInstrDesc, TargetOperandInfo to MCInstrDesc and MCOperandInfo and · 6cc775f9
  Evan Cheng authored Jun 28, 2011
  6cc775f9
Jun 27, 2011
- More refactoring. Move getRegClass from TargetOperandInfo to TargetInstrInfo. · 8d71a757
  Evan Cheng authored Jun 27, 2011
  8d71a757
- Merge XXXGenRegisterDesc.inc XXXGenRegisterNames.inc XXXGenRegisterInfo.h.inc · d9997acd
  Evan Cheng authored Jun 27, 2011
  d9997acd
Jun 24, 2011
- Starting to refactor Target to separate out code that's needed to fully describe · 24753317
  Evan Cheng authored Jun 24, 2011
  24753317
Jun 18, 2011
- Reserve D16-D13 on subtargets that don't support them. · 19d968e6
  Jakob Stoklund Olesen authored Jun 18, 2011
  19d968e6
Jun 17, 2011
- Explicitly invoke ArrayRef constructor to keep gcc happy. · 66773c33
  Jakob Stoklund Olesen authored Jun 17, 2011
  66773c33
- Rename TRI::getAllocationOrder() to getRawAllocationOrder(). · 801f7ab3
  Jakob Stoklund Olesen authored Jun 16, 2011
  801f7ab3
May 30, 2011
- Use the dwarf->llvm mapping to print register names in the cfi · 08600bcf
  Rafael Espindola authored May 30, 2011
  08600bcf
May 19, 2011
- Reuse the TargetInstrDesc. · 58eafde5
  Cameron Zwarich authored May 19, 2011
  58eafde5
- Correctly constrain a register class when computing frame offsets, as the Thumb2 · 00b780e2
  Cameron Zwarich authored May 19, 2011
  00b780e2
Apr 26, 2011
- Add a TRI::getLargestLegalSuperClass hook to provide an upper limit on register class inflation. · 803a2000
  Jakob Stoklund Olesen authored Apr 26, 2011
  803a2000
Apr 19, 2011
- Avoid write-after-write issue hazards for Cortex-A9. · df612ba0
  Bob Wilson authored Apr 19, 2011
  df612ba0