Commits · ed9df5bd2f50b2199204cc6e50910ba52dd5e93e · Roger Ferrer / llvm-epi · GitLab

Apr 30, 2021
- [Passes] Run sinking/hoisting in SimplifyCFG earlier. · ed9df5bd
  Florian Hahn authored Apr 30, 2021
  ed9df5bd
- [AArch64][SVE] Lower index_vector to step_vector · b310dd15
  Jun Ma authored Apr 20, 2021
  b310dd15
- [InlineCost] CallAnalyzer: use TTI info for extractvalue - they are free (PR50099) · ba5b015b
  Roman Lebedev authored Apr 30, 2021
  ba5b015b
- [RISCV][NFC] Merge RV32/RV64 test checks with a common prefix · 1d85b247
  Fraser Cormack authored Apr 30, 2021
  
  1d85b247
- [RISCV] Support STEP_VECTOR with a step greater than one · 791766e6
  Fraser Cormack authored Apr 20, 2021
  791766e6
- [GISel] Teach TableGen to check predicates of immediate operands in patterns · 97ed1b60
  Dominik Montada authored Mar 29, 2021
  97ed1b60
- Reapply [llvm-readobj] [ARMWinEH] Fix handling of relocations and symbol offsets · 4750a8b1
  Martin Storsjö authored Apr 12, 2021
  4750a8b1
- Pre-commit test for PPC vector extraction test · bd48def3
  Qiu Chaofan authored Apr 30, 2021
  
  bd48def3
- [AMDGPU] Skip promote-alloca for insertelement/insertvalue users · 544be708
  Christudasan Devadasan authored Apr 30, 2021
  544be708
- [RISCV] Fix StackOffset calculation when using sp to access the fixed stack... · 5603ed60
  luxufan authored Apr 12, 2021
  5603ed60
- [RISCV] Precommit a test case that test accessing a fixed object when has rvv vector object existed · 325b454e
  luxufan authored Apr 12, 2021
  325b454e
- [AArch64][GlobalISel] Fix width value for G_SBFX/G_UBFX · d7d85f72
  Brendon Cahoon authored Apr 29, 2021
  d7d85f72
- AMDGPU: Add missing runline to test · e6701e57
  Matt Arsenault authored Apr 28, 2021
  e6701e57
- [CodeGen] don't emit addrsig symbol if it's used only by metadata · cab48e2f
  Zequan Wu authored Apr 28, 2021
  cab48e2f
- [XCOFF] Handle the case when personality routine is an alias · 7049fbf9
  jasonliu authored Apr 29, 2021
  7049fbf9
Apr 29, 2021
- Revert "[llvm-readobj] [ARMWinEH] Fix handling of relocations and symbol offsets" · 5bf2ef9d
  Martin Storsjö authored Apr 30, 2021
  5bf2ef9d
- [AArch64][GlobalISel] Simplify out of range rotate amount. · 96ec6d91
  Amara Emerson authored Apr 26, 2021
  96ec6d91
- [llvm-readobj] [ARMWinEH] Fix handling of relocations and symbol offsets · 37789240
  Martin Storsjö authored Apr 12, 2021
  37789240
- Revert "Generalize getInvertibleOperand recurrence handling slightly" · a047837b
  Philip Reames authored Apr 29, 2021
  a047837b
- [AMDGPU] Fix v_swap_b32 formation on physical registers · 16d707e6
  Jay Foad authored Apr 29, 2021
  16d707e6
- [COST] Improve shuffle kind detection if shuffle mask is provided. · 12c51f23
  Alexey Bataev authored Apr 29, 2021
  12c51f23
- Revert "[COST] Improve shuffle kind detection if shuffle mask is provided." · 6e859f3c
  Alexey Bataev authored Apr 29, 2021
  6e859f3c
- Basic block sections for functions with implicit-section-name attribute · a6441191
  Sriraman Tallam authored Apr 29, 2021
  a6441191
- [InstCombine] narrow popcount with zext operand · 0f8b6686
  Sanjay Patel authored Apr 29, 2021
  0f8b6686
- [InstCombine] add tests for popcount with zext operand; NFC · b142e9d1
  Sanjay Patel authored Apr 29, 2021
  b142e9d1
- Revert "RegAlloc: do not consider liveins to EH-pad successors as liveout." · c1b7460b
  Tim Northover authored Apr 29, 2021
  c1b7460b
- AMDGPU/GlobalISel: Fix selection of image intrinsics with unused return · c34900e1
  Petar Avramovic authored Apr 28, 2021
  c34900e1
- RegAlloc: do not consider liveins to EH-pad successors as liveout. · 438a63e1
  Tim Northover authored Apr 29, 2021
  438a63e1
- [AIX][TLS] Add ASM portion changes to support TLSGD relocations to XCOFF objects · ae3377c5
  Victor Huang authored Apr 28, 2021
  ae3377c5
- [SimplifyCFG] Common code sinking: fix application of profitability check · cc632039
  Roman Lebedev authored Apr 29, 2021
  cc632039
- Revert "[X86] Support AMX fast register allocation" · df323ba4
  Benjamin Kramer authored Apr 29, 2021
  df323ba4
- [ConstantFolding] propagate poison through vector reduction intrinsics · 1089158c
  Sanjay Patel authored Apr 29, 2021
  
  1089158c
- [RISCV] Teach DAG combine to fold (and (select_cc lhs, rhs, cc, -1, c), x) ->... · dcdda2bd
  Craig Topper authored Apr 29, 2021
  dcdda2bd
- [RISCV] Add test cases for D101485. NFC · 60216ade
  Craig Topper authored Apr 29, 2021
  
  60216ade
- [COST] Improve shuffle kind detection if shuffle mask is provided. · 92399322
  Alexey Bataev authored Apr 20, 2021
  92399322
- [DebugInfo] Add tests that we emit .eh_frame instead of .debug_frame · b7c66978
  Fangrui Song authored Apr 29, 2021
  b7c66978
- [ConstProp] add tests for vector reductions of poison; NFC · 67801813
  Sanjay Patel authored Apr 29, 2021
  
  67801813
- [RISCV] Enable SPLAT_VECTOR for fixed vXi64 types on RV32. · 0c330afd
  Craig Topper authored Apr 29, 2021
  0c330afd
- [RISCV] Teach computeKnownBits that vsetvli returns number less than 2^31. · 25391cec
  Craig Topper authored Apr 29, 2021
  25391cec
- Revert "[LV] Calculate max feasible scalable VF." · 51d648c1
  Sander de Smalen authored Apr 29, 2021
  51d648c1