Commits · ed9e1a7dcc2eceb4596a5f2ede7daabcb1fdf4ab · Roger Ferrer / llvm-epi · GitLab

May 12, 2021
- [PhaseOrdering] Add test for missing vectorization with NewPM. · ed9e1a7d
  Florian Hahn authored May 12, 2021
  
  ed9e1a7d
- [SCEV] Add loop-guard pessimizing test with step = 2. · 96c1fa2a
  Florian Hahn authored May 12, 2021
  
  96c1fa2a
- [LoopFlatten] Simplify loops so that the pass can operate on unsimplified loops. · 1124ad2f
  Stelios Ioannou authored May 11, 2021
  1124ad2f
- [X86][AVX] Fold concat(ps*lq(x,32),ps*lq(y,32)) -> shuffle(concat(x,y),zero) (PR46621) · fb1d61b7
  Simon Pilgrim authored May 12, 2021
  fb1d61b7
- [AArch64][GlobalISel] Add MMOs to constant pool loads to allow LICM hoisting. · dc8d16c0
  Amara Emerson authored May 12, 2021
  dc8d16c0
- [AMDGPU] Disable the SIFormMemoryClauses pass at -O1 · 5885f1a4
  Baptiste Saleil authored May 12, 2021
  5885f1a4
- [X86][AVX] Add v4i64 shift-by-32 tests · 778562ad
  Simon Pilgrim authored May 12, 2021
  778562ad
- [TargetLowering] Improve legalization of scalable vector types · c5ec00e6
  Fraser Cormack authored May 07, 2021
  c5ec00e6
- [llvm-cov][test] Add test coverage for "gcov" implying "llvm-cov gcov" compatibility. · 1336c5ae
  Jordan Rupprecht authored May 11, 2021
  1336c5ae
- Revert "[SelectionDAG][Mips][PowerPC][RISCV][WebAssembly] Teach... · 8d37411e
  Stefan Pintilie authored May 12, 2021
  8d37411e
- [DAGCombiner] Fix DAG combine store elimination, different address space. · 762ac725
  Hendrik Greving authored May 11, 2021
  762ac725
- [DAGCombiner] Add test exposing bug in DAG combine. · 4b00ffa7
  Hendrik Greving authored May 11, 2021
  4b00ffa7
- [CodeGen][AArch64][SVE] Fold [rdffr, ptest] => rdffrs; bugfix for optimizePTestInstr · 3fa6510f
  Peter Waller authored Apr 27, 2021
  3fa6510f
- [NFC] Use variable GEP index in vec_demanded_elts tests · 61630814
  David Sherwood authored May 12, 2021
  61630814
- [llvm-objdump] Exclude __mh_*_header symbols during MachO disassembly · 5a439015
  Greg McGary authored May 02, 2021
  5a439015
- [AMDGPU] Improve Codegen for build_vector · 46adccc5
  Julien Pagès authored May 12, 2021
  46adccc5
- [InstCombine] ~(C + X) --> ~C - X (PR50308) · 554b1bce
  Roman Lebedev authored May 12, 2021
  554b1bce
- [x86] try harder to lower to PCMPGT instead of not-of-PCMPEQ · f58e0513
  Sanjay Patel authored May 12, 2021
  f58e0513
- [x86] add test for pcmpeq with 0; NFC · 24d06fff
  Sanjay Patel authored May 11, 2021
  
  24d06fff
- [X86][AVX] canonicalizeShuffleMaskWithHorizOp - improve support for 256/512-bit vectors · 72e242a2
  Simon Pilgrim authored May 12, 2021
  72e242a2
- [LoopVectorize] Fix scalarisation crash in widenPHIInstruction for scalable vectors · b7a11274
  David Sherwood authored Apr 21, 2021
  b7a11274
- [AArch64][SVE] Improve sve.convert.to.svbool lowering · 6e6f9a63
  Peter Waller authored Apr 29, 2021
  6e6f9a63
- Reapply "[DebugInfo] Fix updateDbgUsersToReg to support DBG_VALUE_LIST" · fdb055f4
  Stephen Tozer authored May 10, 2021
  fdb055f4
- [AMDGPU] Skip invariant loads when avoiding WAR conflicts · 68137ef5
  Piotr Sobczak authored May 12, 2021
  68137ef5
- [ARM] Prevent spilling between ldrex/strex pairs · 34c098b7
  Tomas Matheson authored May 11, 2021
  34c098b7
- [ARM] Precommit test for D101898 · edf9d882
  Tomas Matheson authored May 05, 2021
  edf9d882
- Fixed llvm-objcopy to add correct symbol table for ELF with program headers. · d8e65585
  Alex Orlov authored May 12, 2021
  d8e65585
- [COFF] Fix ARM and ARM64 REL32 relocations to be relative to the end of the relocation · 382c505d
  Martin Storsjö authored May 11, 2021
  382c505d
- [VectorComine] Restrict single-element-store index to inbounds constant · 6d2df181
  Qiu Chaofan authored May 12, 2021
  6d2df181
- [LoopInterchange] Handle lcssa PHIs with multiple predecessors · 3f8be15f
  Congzhe Cao authored May 11, 2021
  3f8be15f
- AMDGPU: Fix SILoadStoreOptimizer for gfx90a · cc79aace
  Matt Arsenault authored May 10, 2021
  cc79aace
- AMDGPU: Fix assert on constant load from addrspacecasted pointer · a15ed701
  Matt Arsenault authored May 11, 2021
  a15ed701
- GlobalISel: Split ValueHandler into assignment and emission classes · 24e2e5df
  Matt Arsenault authored May 04, 2021
  24e2e5df
- Revert "[GVN] Clobber partially aliased loads." · fec29459
  Jordan Rupprecht authored May 11, 2021
  fec29459
- [LoopInterchange] Fix legality for triangular loops · 40e3aa39
  Congzhe Cao authored May 11, 2021
  40e3aa39
- [Coverage] Support overriding compilation directory · 8280ece0
  Petr Hosek authored Apr 09, 2021
  8280ece0
- Revert "[LoopInterchange] Fix legality for triangular loops" · d3f89d4d
  Congzhe Cao authored May 11, 2021
  d3f89d4d
May 11, 2021
- [AMDGPU] Fix extra waitcnt being added with BUFFER_INVL2 · 4433f460
  Austin Kerbow authored May 11, 2021
  4433f460
- [RISCV] Regenerate stepvector.ll. NFC · d092dd56
  Craig Topper authored May 11, 2021
  d092dd56
- [PowerPC] Improve codegen for int-to-fp conversion of subword vector extract · ffbffaf6
  Albion Fung authored May 11, 2021
  ffbffaf6