Commits · f10a635eb40219f0413b86442f9c1fa46607c65b · Roger Ferrer / llvm-epi · GitLab

Dec 08, 2011
- ARM NEON two-operand aliases for VSHL(register). · f10a635e
  Jim Grosbach authored Dec 08, 2011
  f10a635e
- Simplify offset verification. · bd97f5d7
  Jakob Stoklund Olesen authored Dec 08, 2011
  bd97f5d7
- Fix copy/past-o. · 0dd1bc9c
  Jim Grosbach authored Dec 08, 2011
  0dd1bc9c
- ARM NEON two-operand aliases for VMUL. · 31a462c0
  Jim Grosbach authored Dec 08, 2011
  31a462c0
- Don't include alignment padding in BBInfo.Size. · 2a82333f
  Jakob Stoklund Olesen authored Dec 08, 2011
  2a82333f
- ARM VFP support 'fmrs/fmsr' aliases for 'vldr' · 9a6ba3c9
  Jim Grosbach authored Dec 08, 2011
  9a6ba3c9
- ARM VFP support 'flds/fldd' aliases for 'vldr' · 086d013e
  Jim Grosbach authored Dec 08, 2011
  086d013e
- ARM optional destination operand variants for VEXT instructions. · 6600f520
  Jim Grosbach authored Dec 08, 2011
  6600f520
- ARM assembler aliases for "add Rd, #-imm" to "sub Rd, #imm". · 3050625a
  Jim Grosbach authored Dec 08, 2011
  3050625a
- ARM assembly, allow 'asl' as a synonym for 'lsl' in shifted-register operands. · 3b559ff3
  Jim Grosbach authored Dec 07, 2011
  3b559ff3
- Modify class ReadHardware and add definition of 64-bit version of instruction · 4350c183
  Akira Hatanaka authored Dec 07, 2011
  4350c183
- Add newline. · 66232aa1
  Akira Hatanaka authored Dec 07, 2011
  66232aa1
- Add 64-bit HWR29 register. · 36d2198d
  Akira Hatanaka authored Dec 07, 2011
  36d2198d
- 32 to 64-bit anyext pattern. · 9778e7a6
  Akira Hatanaka authored Dec 07, 2011
  9778e7a6
- 32 to 64-bit zext pattern. · ae378af6
  Akira Hatanaka authored Dec 07, 2011
  ae378af6
- ARM two-operand aliases for VAND/VEOR/VORR instructions. · 90d96125
  Jim Grosbach authored Dec 07, 2011
  90d96125
- ARM two-operand aliases for VADDW instructions. · 3744a7fe
  Jim Grosbach authored Dec 07, 2011
  3744a7fe
Dec 07, 2011
- ARM two-operand aliases for VADD instructions. · 55269155
  Jim Grosbach authored Dec 07, 2011
  55269155
- Variable cleanup. Based on past patch submittals variable names have · 56b70de0
  Bruno Cardoso Lopes authored Dec 07, 2011
  56b70de0
- 64-bit WrapperPICPat patterns. · b2e05cb6
  Akira Hatanaka authored Dec 07, 2011
  b2e05cb6
- Define base class for WrapperPICPat. · 6820eebd
  Akira Hatanaka authored Dec 07, 2011
  6820eebd
- Modify LowerFCOPYSIGN to handle Mips64. · c5b5a8d8
  Akira Hatanaka authored Dec 07, 2011
  c5b5a8d8
- Fix comment. · 4f864b78
  Akira Hatanaka authored Dec 07, 2011
  4f864b78
- Fix comment. · d16e926a
  Akira Hatanaka authored Dec 07, 2011
  d16e926a
- Fix 64-bit immediate patterns. · 4a04a56a
  Akira Hatanaka authored Dec 07, 2011
  4a04a56a
- Nuke inadvertant debugging commit. · d633c2f1
  Jim Grosbach authored Dec 07, 2011
  d633c2f1
- Darwin assembler improved relocs when w/o subsections_via_symbols. · d6ae4ba0
  Jim Grosbach authored Dec 07, 2011
  d6ae4ba0
- Thumb2 alias for long-form pop and friends. · 18b0e5dc
  Jim Grosbach authored Dec 07, 2011
  18b0e5dc
- ARM support the .arm and .thumb directives for assembly mode switching. · 7f882399
  Jim Grosbach authored Dec 07, 2011
  7f882399
- ARM NEON VCLT(register) is a pseudo aliasing VCGT(register). · 721042fa
  Jim Grosbach authored Dec 07, 2011
  721042fa
- Fix a bunch of SSE/AVX patterns to use proper memop types. In particular, not... · 1d578e88
  Craig Topper authored Dec 07, 2011
  1d578e88
- Adjust the stack by one pointer size for all frameless stacks. · 302cf8d5
  Bill Wendling authored Dec 07, 2011
  302cf8d5
- Fix off-by-one error when encoding the stack size for a frameless stack. · 3c864599
  Bill Wendling authored Dec 07, 2011
  3c864599
- Add bundle aware API for querying instruction properties and switch the code · 7f8e563a
  Evan Cheng authored Dec 07, 2011
  7f8e563a
- make CR spill and restore 64-bit clean (no functional change), and fix some... · ac9df3d4
  Hal Finkel authored Dec 07, 2011
  ac9df3d4
- make base register selection used in eliminateFrameIndex 64-bit clean · 16c74418
  Hal Finkel authored Dec 07, 2011
  16c74418
- set mayStore and mayLoad on CR pseudos · abbc2529
  Hal Finkel authored Dec 07, 2011
  abbc2529
- 64-bit LR8 load should use X11 not R11 · 2ba61e47
  Hal Finkel authored Dec 07, 2011
  2ba61e47
- Eliminate delta argument from AdjustBBOffsetsAfter. · 2f0400b7
  Jakob Stoklund Olesen authored Dec 07, 2011
  2f0400b7
- Compute some alignment information for each basic block. · 97c85719
  Jakob Stoklund Olesen authored Dec 07, 2011
  97c85719