Commits · f45daac30ff6265697ed43ba34b4dc66ca1e7e80 · Roger Ferrer / llvm-epi · GitLab

Jul 01, 2011
- Add support for the 'h' constraint. · f45daac3
  Eric Christopher authored Jun 30, 2011
  f45daac3
- Thumb1 register to register MOV instruction is predicable. · b98ab91e
  Jim Grosbach authored Jun 30, 2011
  b98ab91e
Jun 30, 2011
- Pseudo-ize the t2LDMIA_RET instruction. · 353da731
  Jim Grosbach authored Jun 30, 2011
  353da731
- Fix a small thinko for constant i64 lock/orq optimization where we · c9321737
  Eric Christopher authored Jun 30, 2011
  c9321737
- · 0eada032
  Devang Patel authored Jun 29, 2011
  0eada032
- In the ARM global merging pass, allow extraneous alignment specifiers. This pass · 34c8f51d
  Cameron Zwarich authored Jun 29, 2011
  34c8f51d
Jun 29, 2011
- Don't depend on the optimization reverted in r134067. · d2a84f6a
  Benjamin Kramer authored Jun 29, 2011
  d2a84f6a
- Revert a part of r126557 which could create unschedulable DAGs. · 8665f8d9
  Benjamin Kramer authored Jun 29, 2011
  8665f8d9
Jun 28, 2011
- Clean up the handling of the x87 fp stack to make it more robust. · 7297e7e2
  Jakob Stoklund Olesen authored Jun 28, 2011
  7297e7e2
- Implement ISD::VAARG lowering on PPC32. · 4394e68c
  Roman Divacky authored Jun 28, 2011
  4394e68c
- FileCheckize a couple of tests. · 74dd4004
  Jakob Stoklund Olesen authored Jun 28, 2011
  74dd4004
- FileCheck-ize a test that had the strangest TCL quote I've seen yet: an · e2a1b169
  Chandler Carruth authored Jun 28, 2011
  e2a1b169
- Remove the experimental (and unused) pre-ra splitting pass. Greedy regalloc can split live ranges. · b7d00313
  Evan Cheng authored Jun 27, 2011
  b7d00313
- During bottom up fast-isel, instructions emitted to materalize registers are... · 4dc034df
  Devang Patel authored Jun 27, 2011
  4dc034df
Jun 27, 2011
- Allow lr in the register options here. · aff7ed55
  Eric Christopher authored Jun 27, 2011
  aff7ed55
- Move all inline-asm-fpstack tests to a single file. · f6897607
  Jakob Stoklund Olesen authored Jun 27, 2011
  f6897607
Jun 25, 2011
- PTX: corrected tests that were failing · b49b7365
  Dan Bailey authored Jun 25, 2011
  b49b7365
- PTX: Reverting implementation of i8. · b7ee5613
  Dan Bailey authored Jun 25, 2011
  b7ee5613
- Test case for r133858 (tail call optimize in the presence of byval). · f3e11190
  Chad Rosier authored Jun 25, 2011
  f3e11190
Jun 24, 2011
- Handle debug info for i128 constants. · f071d72c
  Devang Patel authored Jun 24, 2011
  f071d72c
- PTX: Add support for i8 type and introduce associated .b8 registers · dd01c4ac
  Dan Bailey authored Jun 24, 2011
  dd01c4ac
- The Neon VCVT (between floating-point and fixed-point, Advanced SIMD) · fa8d8932
  Chad Rosier authored Jun 24, 2011
  fa8d8932
- Change the chain input of nodes that load the address of a function. This change · 35792089
  Akira Hatanaka authored Jun 24, 2011
  35792089
- Prevent generation of redundant addiu instructions that compute address of · ca88b4ab
  Akira Hatanaka authored Jun 24, 2011
  ca88b4ab
Jun 23, 2011
- PTX: Always use registers for return values, but use .param space for device · 6cdd72a9
  Justin Holewinski authored Jun 23, 2011
  6cdd72a9
- PTX: Fixup test cases for device param changes · a4aecf3d
  Justin Holewinski authored Jun 23, 2011
  a4aecf3d
- lit support for REQUIRES: asserts. · 67ff0718
  Andrew Trick authored Jun 22, 2011
  67ff0718
- Reenable tail duplication of bb with just an unconditional jump, but · 2496c1f1
  Rafael Espindola authored Jun 22, 2011
  2496c1f1
Jun 22, 2011
- Needs a triple. · 90e6a4e5
  Nick Lewycky authored Jun 22, 2011
  90e6a4e5
- Emit trailing padding on constant vectors when TargetData says that the vector · 6208a2fd
  Nick Lewycky authored Jun 22, 2011
  6208a2fd
- PTX: Add signed integer comparisons · 6fafebfb
  Justin Holewinski authored Jun 22, 2011
  6fafebfb
- PTX: Add .address_size directive if PTX version >= 2.3 · 54e3c0f5
  Justin Holewinski authored Jun 22, 2011
  54e3c0f5
- Test case for r133560. · c93ef81e
  Devang Patel authored Jun 22, 2011
  c93ef81e
Jun 21, 2011
- Revert r133452: "Emit movq for 64-bit register to XMM register moves..." · 646dd0f4
  Bob Wilson authored Jun 21, 2011
  646dd0f4
- Add support for sadd.with.overflow and uadd.with.overflow intrinsics to the... · 083f0b5a
  Anna Zaks authored Jun 21, 2011
  083f0b5a
- Teach dag combine to match halfword byteswap patterns. · 4c0bd962
  Evan Cheng authored Jun 21, 2011
  4c0bd962
- Re-apply 132758 and 132768 which were speculatively reverted in 132777. · 4c406e74
  Akira Hatanaka authored Jun 21, 2011
  4c406e74
Jun 20, 2011
- PTX: Fix conversion between predicates and value types · cd4484d2
  Justin Holewinski authored Jun 20, 2011
  cd4484d2
- Emit movq for 64-bit register to XMM register moves, but continue to accept · c7df1922
  Nick Lewycky authored Jun 20, 2011
  c7df1922
- Don't apply on PPC64 the 32bit ADDIC optimizations as there's no overflow · 254f8211
  Roman Divacky authored Jun 20, 2011
  254f8211