Commits · f49d4c45a17d4be48f3e3627e9c21212e46bc83c · Roger Ferrer / llvm-epi · GitLab

Apr 05, 2017
- Revert "MemorySSA: Add support for caching clobbering access in stores" · f49d4c45
  Daniel Berlin authored Apr 04, 2017
  f49d4c45
- [MC] Set defaults based on section names and support name suffixes · 880cfd45
  Petr Hosek authored Apr 04, 2017
  880cfd45
- [AArch64] Avoid partial register deps on insertelt of load into lane 0. · d3c03a5d
  Ahmed Bougacha authored Apr 04, 2017
  d3c03a5d
- Change section flag character for SHF_LINK_ORDER to "o". · 12de7b24
  Evgeniy Stepanov authored Apr 04, 2017
  12de7b24
- [InstCombine] Add test cases for various add/subtracts of constants(scalar,... · 1534495f
  Craig Topper authored Apr 04, 2017
  1534495f
- [lit] Add a minimum export implementation. · 07503baf
  Rafael Espindola authored Apr 04, 2017
  07503baf
- [InstCombine] rename variable for easier reading; NFC · 0bf0abed
  Sanjay Patel authored Apr 04, 2017
  0bf0abed
Apr 04, 2017
- [InstCombine] Turn subtract of vectors of i1 into xor like we do for scalar... · c745b6a1
  Craig Topper authored Apr 04, 2017
  c745b6a1
- [AArch64] Add missing schedinfo, check completeness for Falkor. · b3120b6d
  Balaram Makam authored Apr 04, 2017
  b3120b6d
- [ExecutionDepsFix] Don't revisit true dependencies · 282c6249
  Keno Fischer authored Apr 04, 2017
  282c6249
- [InstCombine] Support folding and/or/xor with a constant vector RHS into selects and phis · 86173600
  Craig Topper authored Apr 04, 2017
  86173600
- [AArch64][Fuchsia] Allow -mcmodel=kernel for --target=aarch64-fuchsia · 9eb0a1e0
  Petr Hosek authored Apr 04, 2017
  9eb0a1e0
- [InstCombine] Add test cases for missing combines of phis with and/or/xor with... · 11791a72
  Craig Topper authored Apr 04, 2017
  11791a72
- Implement host CPU detection for AArch64 · 57019dc9
  Yi Kong authored Apr 04, 2017
  57019dc9
- Verifier: Check some amdgpu calling convention restrictions · 33339687
  Matt Arsenault authored Apr 04, 2017
  33339687
- [AArch64] Refine Falkor Machine Model - Part 2 · 7b5c098c
  Balaram Makam authored Apr 04, 2017
  7b5c098c
- [X86][inline-asm] Add support for MS 'EVEN' directive · 3847be94
  Coby Tayree authored Apr 04, 2017
  3847be94
- [InstCombine] Add more test cases for missing combines of selects with... · 78cfbc16
  Craig Topper authored Apr 04, 2017
  78cfbc16
- [RuntimeDyld] Make RuntimeDyld honor the ProcessAllSections flag. · d22badef
  Lang Hames authored Apr 04, 2017
  d22badef
- [x86] remove dead select-of-constants transform; NFCI · ac618383
  Sanjay Patel authored Apr 04, 2017
  ac618383
- [PGO] Memory intrinsic calls optimization based on profiled size · 48596b6f
  Rong Xu authored Apr 04, 2017
  48596b6f
- AMDGPU: Remove legacy export intrinsic · 3e90f848
  Matt Arsenault authored Apr 04, 2017
  3e90f848
- AMDGPU: Remove legacy image intrinsics · 236da200
  Matt Arsenault authored Apr 04, 2017
  236da200
- [X86][MS-compatability]Allow named synonymous for MS-assembly operators · 2cb497af
  Coby Tayree authored Apr 04, 2017
  2cb497af
- Strip trailing whitespace · 448222d8
  Simon Pilgrim authored Apr 04, 2017
  448222d8
- [globalisel][tablegen] Fix non-determinism introduced in r299430. · 9e4817d4
  Daniel Sanders authored Apr 04, 2017
  9e4817d4
- [globalisel][tablegen] Try to make MSVC happy with r299430 · db7ed37c
  Daniel Sanders authored Apr 04, 2017
  db7ed37c
- [X86][LLVM] Converting __mm{|256|512}_movm_epi{8|16|32|64} LLVMIR call into generic intrinsics. · 88fb1710
  Michael Zuckerman authored Apr 04, 2017
  88fb1710
- [tablegen][globalisel] Add support for nested instruction matching. · bee5739a
  Daniel Sanders authored Apr 04, 2017
  bee5739a
- [mips] Deal with empty blocks in the mips hazard scheduler · 0a47edb1
  Simon Dardis authored Apr 04, 2017
  0a47edb1
- [X86] Add 64 bit pattern matching for PSADBW · 568fb197
  Oren Ben Simhon authored Apr 04, 2017
  568fb197
- Align all scalar numbers to LLVM_YAML_IS_FLOW_SEQUENCE_VECTOR · 1f9b0011
  Jonas Hahnfeld authored Apr 04, 2017
  1f9b0011
- [InstCombine] Use setAllBits in place of getAllOnesValue since we know the... · e06b6bcf
  Craig Topper authored Apr 04, 2017
  e06b6bcf
- InstCombine: Use the InstSimplify hook for shufflevector · 82bf48d8
  Zvi Rackover authored Apr 04, 2017
  82bf48d8
- [PDB] Save one type record copy · 13fc411e
  Reid Kleckner authored Apr 04, 2017
  13fc411e
- [codeview] Cope with unsorted streams in type merging · c4b5d794
  Reid Kleckner authored Apr 03, 2017
  c4b5d794
- [Fuzzer] Flush std::cout before aborting in CxxStringEqTest · 67cecd1e
  Reid Kleckner authored Apr 03, 2017
  67cecd1e
- add/move codegen tests for and/or of setcc; NFC · a4546efb
  Sanjay Patel authored Apr 03, 2017
  a4546efb
- Update stale doxygen links in ProgrammersManual.rst · 4e3cc794
  Tim Northover authored Apr 03, 2017
  4e3cc794
- InstSimplify: Add a hook for shufflevector · 8f460655
  Zvi Rackover authored Apr 03, 2017
  8f460655