Commits · f57ae33381f27445d2b174bfae2cd94d49852398 · Roger Ferrer / llvm-epi · GitLab

Mar 27, 2017
- [InstCombine] Avoid incorrect folding of select into phi nodes when incoming... · f57ae333
  Anna Thomas authored Mar 27, 2017
  f57ae333
- Correct OptionCategoryCompare() in the command line library. · 513c3e47
  Daniel Sanders authored Mar 27, 2017
  513c3e47
- [X86][AVX2] bugzilla bug 21281 Performance regression in vector interleave in AVX2 · 89d5f939
  Gadi Haber authored Mar 27, 2017
  89d5f939
- [IR] Implement pairs of non-const and const methods using the const version... · 1dd20e65
  Craig Topper authored Mar 27, 2017
  1dd20e65
- [IR] Share implementation for pairs of const and non-const methods using const_cast. NFCI · 1c78f4a0
  Craig Topper authored Mar 27, 2017
  1c78f4a0
- [IR] Share implementation of pairs of const and non-const methods in... · 74fb7ac2
  Craig Topper authored Mar 27, 2017
  74fb7ac2
- [IR] Make Instruction::isAssociative method inline. Add LLVM_READONLY to the static version. · 224b19d6
  Craig Topper authored Mar 26, 2017
  224b19d6
Mar 26, 2017
- [Target] Remove some code probably copy/pasted from another backend. · a2c4e4b9
  Davide Italiano authored Mar 26, 2017
  a2c4e4b9
- [MachineScheduler] Reference the correct header. · 5c2aa5d3
  Davide Italiano authored Mar 26, 2017
  5c2aa5d3
- [LoopUnroll] Remap references in peeled iteration · b71bb80c
  Serge Pavlov authored Mar 26, 2017
  b71bb80c
- [X86][SSE] Add computeKnownBitsForTargetNode support for (V)PSLL/(V)PSRL instructions · 92925ea7
  Simon Pilgrim authored Mar 26, 2017
  92925ea7
- [X86][AVX512F] Fix reg class for VMOVSSZrr/VMOVSSZrrk and VMOVSDZrr/VMOVSDZrrk · 049d9c92
  Simon Pilgrim authored Mar 26, 2017
  049d9c92
- [GlobalISel][X86] support G_FRAME_INDEX instruction selection. · 531a203a
  Igor Breger authored Mar 26, 2017
  531a203a
- Split the SimplifyCFG pass into two variants. · fa736742
  Joerg Sonnenberger authored Mar 26, 2017
  fa736742
- [IR] Make SwitchInst::CaseIt almost a normal iterator. · 0d256c0f
  Chandler Carruth authored Mar 26, 2017
  0d256c0f
Mar 25, 2017
- [X86] Pull out repeated ScalarValueSizeInBits code. NFCI. · bec234c9
  Simon Pilgrim authored Mar 25, 2017
  bec234c9
- [X86][SSE] Combine (VSRLI (VSRAI X, Y), (NumSignBits-1)) -> (VSRLI X, (NumSignBits-1)) · c0720a40
  Simon Pilgrim authored Mar 25, 2017
  c0720a40
- [X86][SSE] Added ComputeNumSignBitsForTargetNode support for (V)PSRAI · 6397963c
  Simon Pilgrim authored Mar 25, 2017
  6397963c
- [X86][SSE] Generalised CMP+AND1 combine to ZERO/ALLBITS+MASK · 5400a4d0
  Simon Pilgrim authored Mar 25, 2017
  5400a4d0
- [x86] use PMOVMSK to replace memcmp libcalls for 16-byte equality · 9ebb6884
  Sanjay Patel authored Mar 25, 2017
  9ebb6884
- [InstCombine] Change the interface of SimplifyDemandedBits so that it takes... · 47596dd4
  Craig Topper authored Mar 25, 2017
  47596dd4
- [AArch64] Refine Falkor Machine Model - Part1 · cf0e5e1c
  Balaram Makam authored Mar 25, 2017
  cf0e5e1c
- [NewGVN] Adjust NDEBUG markers. · e9781e7b
  Davide Italiano authored Mar 25, 2017
  e9781e7b
- [AMDGPU] Switch data layout by triple environment amdgiz · 14834c3e
  Yaxun Liu authored Mar 25, 2017
  14834c3e
- [libFuzzer] Fix test on Windows. · 72b8acfb
  Vitaly Buka authored Mar 25, 2017
  72b8acfb
- [asan] Put ctor/dtor in comdat. · 71bb8f1a
  Evgeniy Stepanov authored Mar 25, 2017
  71bb8f1a
- [libFuzzer] read asan's dedup_token while minimizing a crash and stop... · 86e630b8
  Kostya Serebryany authored Mar 25, 2017
  86e630b8
- [ARM] Fix mixup between Lo and Hi in SMLALBB formation. · 95ddd187
  Eli Friedman authored Mar 25, 2017
  95ddd187
- Apply clang-format as commented in D31311. NFCI. · dbc94db3
  Simon Pilgrim authored Mar 24, 2017
  dbc94db3
- [codeview] Don't assert when the user violates the ODR · 6b78e163
  Reid Kleckner authored Mar 24, 2017
  6b78e163
- [Outliner] Revert r298734. · eac8633d
  Jessica Paquette authored Mar 24, 2017
  eac8633d
Mar 24, 2017
- [libFuzzer] be more careful when calling strlen of strcmp parameters, PR32357 · c58982d6
  Kostya Serebryany authored Mar 24, 2017
  c58982d6
- Revert r298711 "[InstCombine] Provide a way to calculate KnownZero/One for... · 8fbb74b5
  Craig Topper authored Mar 24, 2017
  8fbb74b5
- [libFuzzer] honor -exact_artifact_path for all intermediate files during crash... · dba9ded6
  Kostya Serebryany authored Mar 24, 2017
  dba9ded6
- AMDGPU: Fix annotating loops with nested loop conditions · 0607a442
  Matt Arsenault authored Mar 24, 2017
  0607a442
- [MachineScheduler] Add missing machine pass dependency. · 6a1209ee
  Davide Italiano authored Mar 24, 2017
  6a1209ee
- Revert r298620: [LV] Vectorize GEPs · c2124e18
  Ivan Krasin authored Mar 24, 2017
  c2124e18
- [Outliner] Remove no red zone requirment for AArch64 · 167af85e
  Jessica Paquette authored Mar 24, 2017
  167af85e
- [asan] Delay creation of asan ctor. · 64e872a9
  Evgeniy Stepanov authored Mar 24, 2017
  64e872a9
- AMDGPU: Implement f16 fround · b5d23271
  Matt Arsenault authored Mar 24, 2017
  b5d23271