Commits · f63791e778cc72c2676453e78903f4df24c3abd1 · Roger Ferrer / llvm-epi · GitLab

Jun 25, 2013
- R600/SI: Expand srl of v2i32/v4i32 for SI · f63791e7
  Aaron Watry authored Jun 25, 2013
  f63791e7
- R600/SI: Expand shl of v2i32/v4i32 for SI · 55845539
  Aaron Watry authored Jun 25, 2013
  55845539
- R600/SI: Expand or of v2i32/v4i32 for SI · 2fa162e8
  Aaron Watry authored Jun 25, 2013
  2fa162e8
- R600/SI: Expand mul of v2i32/v4i32 for SI · 265eef5e
  Aaron Watry authored Jun 25, 2013
  265eef5e
- R600/SI: Expand and of v2i32/v4i32 for SI · 00aeb119
  Aaron Watry authored Jun 25, 2013
  00aeb119
- · ad873cdb
  Ulrich Weigand authored Jun 25, 2013
  ad873cdb
- · 6c31c4aa
  Ulrich Weigand authored Jun 25, 2013
  6c31c4aa
- · 4069e24b
  Ulrich Weigand authored Jun 25, 2013
  4069e24b
- [NVPTX] Default pointer type doesn't make sense for getParamSymbol() · aaaf2897
  Justin Holewinski authored Jun 25, 2013
  aaaf2897
- Revert "Temporarily enable MI-Sched on X86." · 121124ac
  Andrew Trick authored Jun 25, 2013
  121124ac
- R600/SI: Report unaligned memory accesses as legal for > 32-bit types · 0125f2a6
  Tom Stellard authored Jun 25, 2013
  0125f2a6
- R600: Add support for i32 loads from the constant address space on Cayman · 9810ec61
  Tom Stellard authored Jun 25, 2013
  9810ec61
- R600/SI: Add support for v4i32 and v4f32 kernel args · b06f3fc1
  Tom Stellard authored Jun 25, 2013
  b06f3fc1
- R600: Fix typo in R600Schedule.td · 9d2e1500
  Tom Stellard authored Jun 25, 2013
  9d2e1500
- PPCAsmParser.cpp: Quote "@l/@ha" in comments. [-Wdocumentation] · 36c17ee5
  NAKAMURA Takumi authored Jun 25, 2013
  36c17ee5
Jun 24, 2013
- · 6ca71579
  Ulrich Weigand authored Jun 24, 2013
  6ca71579
- PPC: Remove default case from fully covered switch. · 3912d785
  Benjamin Kramer authored Jun 24, 2013
  3912d785
- R600: Fix spelling error in comment · 52a72c92
  Aaron Watry authored Jun 24, 2013
  52a72c92
- · 86247b6e
  Ulrich Weigand authored Jun 24, 2013
  86247b6e
- NVPTXTargetObjectFile.h: Initialize some pointers as NULL in the constructor... · f7f5894d
  NAKAMURA Takumi authored Jun 24, 2013
  f7f5894d
- · fedd5a75
  Ulrich Weigand authored Jun 24, 2013
  fedd5a75
- · 824b7d8d
  Ulrich Weigand authored Jun 24, 2013
  824b7d8d
- · b6a30d15
  Ulrich Weigand authored Jun 24, 2013
  b6a30d15
- · 5b9d591a
  Ulrich Weigand authored Jun 24, 2013
  5b9d591a
- · d20e91ed
  Ulrich Weigand authored Jun 24, 2013
  d20e91ed
- · 1847bb81
  Ulrich Weigand authored Jun 24, 2013
  1847bb81
- This patch introduces RegisterOperand class into Mips FPU instruction... · 233dd51b
  Vladimir Medic authored Jun 24, 2013
  233dd51b
- ARM: check predicate bits for thumb instructions · 8449c0d5
  Amaury de la Vieuville authored Jun 24, 2013
  8449c0d5
- ARM: rGPR is meant to be unpredictable, not undefined · 8175bda3
  Amaury de la Vieuville authored Jun 24, 2013
  8175bda3
- Temporarily enable MI-Sched on X86. · 5a1e0af8
  Andrew Trick authored Jun 24, 2013
  5a1e0af8
- ARM: fix thumb1 nop decoding · f2f00b4e
  Amaury de la Vieuville authored Jun 24, 2013
  f2f00b4e
- ARM: fix IT decoding · 2f0ac8d9
  Amaury de la Vieuville authored Jun 24, 2013
  2f0ac8d9
- ARM: enable decoding of pc-relative PLD/PLI · 4b6c076d
  Amaury de la Vieuville authored Jun 24, 2013
  4b6c076d
Jun 23, 2013
- Add MI-Sched support for x86 macro fusion. · 47740deb
  Andrew Trick authored Jun 23, 2013
  47740deb
Jun 22, 2013
- The getRegForInlineAsmConstraint function should only accept MVT value types. · 295bd43a
  Chad Rosier authored Jun 22, 2013
  295bd43a
- DebugInfo: Don't lose unreferenced non-trivial by-value parameters · 97c6c5bd
  David Blaikie authored Jun 21, 2013
  97c6c5bd
Jun 21, 2013
- [NVPTX] Add support for selecting CUDA vs OCL mode based on triple · b6e6cd35
  Justin Holewinski authored Jun 21, 2013
  b6e6cd35
- Fix IMULX machine model. Multiple def operands require multiple SchedWrites. · 7201f4f7
  Andrew Trick authored Jun 21, 2013
  7201f4f7
- · 91add7df
  Ulrich Weigand authored Jun 21, 2013
  91add7df
- · 876a0d01
  Ulrich Weigand authored Jun 21, 2013
  876a0d01