Commits · f77079f892548efa3b34c16233d8779d25d92f58 · Roger Ferrer / llvm-epi · GitLab

Jan 14, 2019
- [AMDGPU] Add support for TFE/LWE in image intrinsics. 2nd try · f77079f8
  David Stuttard authored Jan 14, 2019
  f77079f8
Dec 12, 2018
- [AMDGPU] Extend the SI Load/Store optimizer to combine more things. · 76504a4c
  Neil Henning authored Dec 12, 2018
  76504a4c
Nov 30, 2018
- AMDGPU: Divergence-driven selection of scalar buffer load intrinsics · a7b00058
  Nicolai Haehnle authored Nov 30, 2018
  a7b00058
Nov 29, 2018
- Revert r347871 "Fix: Add support for TFE/LWE in image intrinsic" · c6603861
  David Stuttard authored Nov 29, 2018
  c6603861
- Add support for TFE/LWE in image intrinsics · de02e4b1
  David Stuttard authored Nov 29, 2018
  de02e4b1
- AMDGPU/InsertWaitcnts: Untangle some semi-global state · 1a94cbb3
  Nicolai Haehnle authored Nov 29, 2018
  1a94cbb3
Nov 16, 2018
- [AMDGPU] Add FixupVectorISel pass, currently Supports SREGs in GLOBAL LD/ST · cac749ac
  Ron Lieberman authored Nov 16, 2018
  cac749ac
- AMDHSA: More code object v3 fixes: · af7b5d70
  Konstantin Zhuravlyov authored Nov 15, 2018
  af7b5d70
Nov 07, 2018
- Revert "AMDGPU: Divergence-driven selection of scalar buffer load intrinsics" · bc233f55
  Nicolai Haehnle authored Nov 07, 2018
  bc233f55
Nov 05, 2018
- AMDGPU: Add sram-ecc feature · 108927b9
  Konstantin Zhuravlyov authored Nov 05, 2018
  108927b9
Oct 31, 2018
- AMDGPU: Rewrite SILowerI1Copies to always stay on SALU · 814abb59
  Nicolai Haehnle authored Oct 31, 2018
  814abb59
Oct 17, 2018
- AMDGPU: Divergence-driven selection of scalar buffer load intrinsics · c4a2ff09
  Nicolai Haehnle authored Oct 17, 2018
  c4a2ff09
Sep 14, 2018
- AMDGPU: Clear the bits before they are being set in program resource registers · e721b11c
  Konstantin Zhuravlyov authored Sep 14, 2018
  e721b11c
Sep 12, 2018
- AMDGPU: Re-apply r341982 after fixing the layering issue · 71e43ee4
  Konstantin Zhuravlyov authored Sep 12, 2018
  71e43ee4
- Revert "AMDGPU: Move isa version and EF_AMDGPU_MACH_* determination into TargetParser." · 95066496
  Ilya Biryukov authored Sep 12, 2018
  95066496
Sep 11, 2018
- AMDGPU: Move isa version and EF_AMDGPU_MACH_* determination · 941615e4
  Konstantin Zhuravlyov authored Sep 11, 2018
  941615e4
Aug 31, 2018
- AMDGPU: Remove remnants of old address space mapping · 0da6350d
  Matt Arsenault authored Aug 31, 2018
  0da6350d
Aug 21, 2018
- [AMDGPU] New buffer intrinsics · 4f703f5e
  Tim Renouf authored Aug 21, 2018
  4f703f5e
Aug 01, 2018
- [AMDGPU] Optimize _L image intrinsic to _LZ when lod is zero · 894c8fd0
  Ryan Taylor authored Aug 01, 2018
  894c8fd0
Jun 29, 2018
- AMDGPU: Separate R600 and GCN TableGen files · c5a154db
  Tom Stellard authored Jun 28, 2018
  c5a154db
Jun 21, 2018
- [AMDGPU] Update assembler for HSA Code Object v3 · 1e8c2c70
  Scott Linder authored Jun 21, 2018
  1e8c2c70
- AMDGPU: Select MIMG instructions manually in SITargetLowering · 7a9c03f4
  Nicolai Haehnle authored Jun 21, 2018
  7a9c03f4
- AMDGPU: Refactor MIMG instruction TableGen using generic tables · 0ab200b6
  Nicolai Haehnle authored Jun 21, 2018
  0ab200b6
- AMDGPU: Use generic tables instead of SearchableTable · e741d7e0
  Nicolai Haehnle authored Jun 21, 2018
  e741d7e0
- AMDGPU: Turn D16 for MIMG instructions into a regular operand · f2674319
  Nicolai Haehnle authored Jun 21, 2018
  f2674319
Jun 12, 2018
- AMDHSA: Code object v3 updates · 00f2cb11
  Konstantin Zhuravlyov authored Jun 12, 2018
  00f2cb11
May 16, 2018
- AMDGPU : Recalculate SGPRs when trap handler is supported · c72ece6c
  Konstantin Zhuravlyov authored May 16, 2018
  c72ece6c
May 01, 2018
- Remove \brief commands from doxygen comments. · 5f8f34e4
  Adrian Prantl authored May 01, 2018
  5f8f34e4
Apr 30, 2018
- AMDGPU: Add Vega12 and Vega20 · 0084adc5
  Matt Arsenault authored Apr 30, 2018
  0084adc5
Apr 18, 2018
- [AMDGPU] Enabled v2.16 literals for VOP3P · 8b20b7dc
  Stanislav Mekhanoshin authored Apr 17, 2018
  8b20b7dc
Apr 09, 2018
- AMDGPU: Remove max_scratch_backing_memory_byte_size from kernel header · 6183065b
  Konstantin Zhuravlyov authored Apr 09, 2018
  6183065b
Apr 04, 2018
- AMDGPU: Fix copying i1 value out of loop with non-uniform exit · 3ffd383a
  Nicolai Haehnle authored Apr 04, 2018
  3ffd383a
Apr 01, 2018
- AMDGPU: Make isIntrinsicSourceOfDivergence table-driven · 4254d45a
  Nicolai Haehnle authored Apr 01, 2018
  4254d45a
Mar 06, 2018
- [AMDGPU] Add default ISA version targets · 0f722254
  Stanislav Mekhanoshin authored Mar 06, 2018
  0f722254
Mar 05, 2018
- Pass Divergence Analysis data to Selection DAG to drive divergence · 2e5eecee
  Alexander Timofeev authored Mar 05, 2018
  2e5eecee
Feb 16, 2018
- AMDGPU: Bring processors and features in sync with the spec · 331f97e1
  Konstantin Zhuravlyov authored Feb 16, 2018
  331f97e1
Feb 13, 2018
- [AMDGPU] Change constant addr space to 4 · 0124b548
  Yaxun Liu authored Feb 13, 2018
  0124b548
Feb 09, 2018
- Reapply "AMDGPU: Add 32-bit constant address space" · 923712b6
  Matt Arsenault authored Feb 09, 2018
  923712b6
- AMDGPU: Fix layering issue · bcf7bec4
  Matt Arsenault authored Feb 09, 2018
  bcf7bec4
Feb 07, 2018
- Revert "AMDGPU: Add 32-bit constant address space" · f4e3f3e3
  Rafael Espindola authored Feb 07, 2018
  f4e3f3e3