Commits · f82d68ff533e50e27129d6a8905fb716f9f79937 · Roger Ferrer / llvm-epi · GitLab

Mar 08, 2017
- [ARM] Split up lsl-zero test into two tests · f82d68ff
  John Brawn authored Mar 08, 2017
  f82d68ff
Mar 07, 2017
- [ARM] Correct handling of LSL #0 in an IT block · eba9fdac
  John Brawn authored Mar 07, 2017
  eba9fdac
Mar 03, 2017
- [AMDGPU][MC] Fix for Bug 30829 + LIT tests · 03880f8d
  Dmitry Preobrazhensky authored Mar 03, 2017
  03880f8d
Mar 01, 2017
- [Hexagon] Fix testcase accidentally broken by r296645 · 5f4dedff
  Krzysztof Parzyszek authored Mar 01, 2017
  5f4dedff
- [ARM] Fix bash-ism in test · 9c199aaf
  Oliver Stannard authored Mar 01, 2017
  9c199aaf
- [ARM] Fix parsing of special register masks · 5d35b9e5
  Oliver Stannard authored Mar 01, 2017
  5d35b9e5
- [DWARFv5] llvm-mc support for new unit header. · dccb4fef
  Paul Robinson authored Feb 28, 2017
  dccb4fef
Feb 28, 2017
- AMDGPU: Add definition for v_swap_b32 · 4d263f6f
  Matt Arsenault authored Feb 28, 2017
  4d263f6f
- AMDGPU: Add definition for v_xad_u32 · 03612631
  Matt Arsenault authored Feb 28, 2017
  03612631
- AMDGPU: Add ds_nop to assembler · 78124983
  Matt Arsenault authored Feb 28, 2017
  78124983
- AMDGPU: Add definitions for ds_{read|write}_b{96|128} · dedc544a
  Matt Arsenault authored Feb 28, 2017
  dedc544a
- [AMDGPU] Change amd_kernel_code_t's minor version to 1 · 182e9cc6
  Konstantin Zhuravlyov authored Feb 28, 2017
  182e9cc6
- [mips] Fix 64bit slt/sltu/nor with immediates · e3cceed3
  Simon Dardis authored Feb 28, 2017
  e3cceed3
- [Assembler] Add test for !srcloc references in assembler diags · 98f02750
  Sanne Wouda authored Feb 28, 2017
  98f02750
- [ARM] Diagnose PC-writing instructions in IT blocks · 85d4d5b4
  Oliver Stannard authored Feb 28, 2017
  85d4d5b4
Feb 27, 2017
- AMDGPU: Use v_med3_{f16|i16|u16} · 10268f93
  Matt Arsenault authored Feb 27, 2017
  10268f93
- AMDGPU: Add some of the new gfx9 VOP3 instructions · c9f2517e
  Matt Arsenault authored Feb 27, 2017
  c9f2517e
- AMDGPU: Add VOP3P instruction format · 9be7b0d4
  Matt Arsenault authored Feb 27, 2017
  9be7b0d4
- [ARM] LSL #0 is an alias of MOV · c97b714f
  John Brawn authored Feb 27, 2017
  c97b714f
- [AMDGPU] Runtime metadata fixes: · 972948b3
  Konstantin Zhuravlyov authored Feb 27, 2017
  972948b3
Feb 24, 2017
- Disallow redefinition of section symbols. · 00400d36
  Evgeniy Stepanov authored Feb 24, 2017
  00400d36
- [mips] Handle 64 bit immediate in and/or/xor pseudo instructions on mips64 · aa208817
  Simon Dardis authored Feb 24, 2017
  aa208817
Feb 23, 2017
- [mips][ias] Further relax operands of certain assembly instructions · d410fc8f
  Simon Dardis authored Feb 23, 2017
  d410fc8f
Feb 22, 2017
- [WebAssembly] Implement the wasm binary container header. · 7ea5adff
  Dan Gohman authored Feb 22, 2017
  7ea5adff
- * [AMDGPU][mc][tests] Updated coverage/smoke tests for gfx7 and gfx8; minor test corrections. · 4f3b9672
  Dmitry Preobrazhensky authored Feb 22, 2017
  4f3b9672
Feb 21, 2017
- Test commit · e6e20534
  Dmitry Preobrazhensky authored Feb 21, 2017
  e6e20534
- [ARM] Correct SP/PC handling in t2MOVr · cfd4f9cf
  John Brawn authored Feb 21, 2017
  cfd4f9cf
Feb 20, 2017
- [mips] Add test for mul macro variants · df943b02
  Simon Dardis authored Feb 20, 2017
  df943b02
Feb 18, 2017
- AMDGPU: Fix disassembly of aperture registers · a3b3b489
  Matt Arsenault authored Feb 18, 2017
  a3b3b489
- AMDGPU: Merge initial gfx9 support · e823d92f
  Matt Arsenault authored Feb 18, 2017
  e823d92f
Feb 17, 2017
- [AArch64] Add Cavium ThunderX support · ab0f3b43
  Joel Jones authored Feb 17, 2017
  ab0f3b43
- MC/COFF: Do not emit forward associative section referenceds. · ac20c179
  Rui Ueyama authored Feb 17, 2017
  ac20c179
Feb 16, 2017
- [AArch64] AArch64AsmParser clean up of isImmediate functions. NFC · cb2d9502
  Sjoerd Meijer authored Feb 16, 2017
  cb2d9502
Feb 15, 2017
- AMDGPU: Replace assert with report_fatal_error · d122abea
  Matt Arsenault authored Feb 15, 2017
  d122abea
Feb 13, 2017
- [mips] Fix failing test. · d9858dfd
  Simon Dardis authored Feb 13, 2017
  d9858dfd
- [mips] divide macro instruction cleanup. · 509da1a4
  Simon Dardis authored Feb 13, 2017
  509da1a4
Feb 11, 2017
- [Hexagon] Introduce Hexagon V62 · f9015e62
  Krzysztof Parzyszek authored Feb 10, 2017
  f9015e62
Feb 10, 2017
- [Hexagon] Replace instruction definitions with auto-generated ones · a72fad98
  Krzysztof Parzyszek authored Feb 10, 2017
  a72fad98
Feb 09, 2017
- Make it possible to set SHF_LINK_ORDER explicitly. · dc1c3011
  Rafael Espindola authored Feb 09, 2017
  dc1c3011
- [X86] Clzero intrinsic and its addition under znver1 · 50f3d145
  Craig Topper authored Feb 09, 2017
  50f3d145