Commits · f9c2a341b94ca71508dcefa109ece843459f7f13 · Roger Ferrer / llvm-epi · GitLab

Mar 08, 2023
- [SROA] Create additional vector type candidates based on store and load slices · f9c2a341
  Han Zhu authored Jan 23, 2023
  f9c2a341
- [X86] AMD Genoa (znver4) Scheduler model update · ffdd5a33
  Ganesh Gopalasubramanian authored Feb 14, 2023
  
  ffdd5a33
- [VPlan] Add predicate to VPReplicateRecipe, expand region later. · 79272ec0
  Florian Hahn authored Mar 08, 2023
  79272ec0
- [CodeGen] Prevent nullptr deref in genAlternativeCodeSequence · c0967995
  Felipe de Azevedo Piovezan authored Mar 08, 2023
  c0967995
- [RISCV] Make getFPImm return a float instead of a uint32_t. NFC · 7fb0b1b8
  Craig Topper authored Mar 08, 2023
  7fb0b1b8
- [DAGCombiner] Avoid converting (x or/xor const) + y to (x + y) + const if benefit is unclear · a66bc1c4
  Juneyoung Lee authored Feb 15, 2023
  a66bc1c4
- [X86] Add masked predicate execution variants for instructions in X86FixupInstTuning · 8ac8c579
  Noah Goldstein authored Mar 08, 2023
  8ac8c579
- [X86] Add support for using Sched/Codesize information to `X86FixupInstTuning` Pass. · 6b29a6f2
  Noah Goldstein authored Feb 22, 2023
  6b29a6f2
- [IVDescriptors] Pass IsSigned when creating an all 1s constant for UMin recurrence. · 80910d6c
  Craig Topper authored Mar 08, 2023
  80910d6c
- [RISCV] Don't parse the decimal minimum value for fli.s/fli.d/fli.h. · 73516b35
  Craig Topper authored Mar 08, 2023
  73516b35
- [RISCV] Store fli min/nan/inf in index form in RISCVOperand. · 61ae2aaf
  Craig Topper authored Mar 08, 2023
  61ae2aaf
- [RISCV] Add vsseg intrinsic for fixed length vectors · d610c6c9
  Luke Lau authored Mar 01, 2023
  d610c6c9
- [CodeGenPrepare] Stop llvm.vscale() -> getelementptr(null, 1) transformation. · adbdf273
  Paul Walker authored Mar 08, 2023
  adbdf273
- [AArch64] Fix load-insert-zero patterns with i8 and negative offsets. · 1c6ea961
  David Green authored Mar 08, 2023
  1c6ea961
- Revert "[IRLinker] Fix mapping of declaration metadata" · e510d0bd
  Carl Ritson authored Mar 08, 2023
  e510d0bd
- [AMDGPU] Scheduler: fix RP calculation for a MBB with one successor · a9996699
  Valery Pykhtin authored Oct 27, 2022
  a9996699
- [VPlan] Check if recipe is in ReplicateRegion for IfPredicateInstr (NFC) · 3b2cf45d
  Florian Hahn authored Mar 08, 2023
  3b2cf45d
- [AMDGPU] Skip buffer_wbl2 before atomic fence acquire · 59162e38
  Stanislav Mekhanoshin authored Mar 07, 2023
  59162e38
- [InstCombine][debuginfo] Update valueCoversEntireFragment for fixed size... · c7fcae52
  Yeting Kuo authored Feb 21, 2023
  c7fcae52
- [PowerPC] Check if the latch block is in the value list for the PHI before get the incoming value. · 5541f473
  esmeyi authored Mar 08, 2023
  5541f473
- [IRLinker] Fix mapping of declaration metadata · be0ef4b9
  Carl Ritson authored Mar 08, 2023
  be0ef4b9
- [NFC] Remove dead code in ExtAddrMode::print checked by coverty tool · eed31bbb
  Xiang1 Zhang authored Mar 08, 2023
  
  eed31bbb
- [ADCE] Preserve MemorySSA if only debug instructions are removed · b9337b10
  Mikael Holmen authored Mar 03, 2023
  b9337b10
- Revert "[ADCE] Preserve MemorySSA if only debug instructions are removed" · 1db2fb99
  Mikael Holmen authored Mar 08, 2023
  1db2fb99
- [ADCE] Preserve MemorySSA if only debug instructions are removed · db7d8678
  Mikael Holmen authored Mar 03, 2023
  db7d8678
- [AMDGPU] Extend WorkGroupID* codegen for compute shaders · 2171f04c
  Christudasan Devadasan authored Mar 01, 2023
  2171f04c
- [RISCV] Const correct some methods in RISCVOperand. NFC · 36bbea80
  Craig Topper authored Mar 07, 2023
  
  36bbea80
- [DAGCombiner] don't use the pointer info for widen store · fc26ab36
  Chen Zheng authored Feb 24, 2023
  fc26ab36
- [Inliner][NFC] Remove redundant nullptr check · 795aebf3
  Alex MacLean authored Mar 07, 2023
  795aebf3
- [RISCV] Don't accept '-min', '-inf' or '-nan' in RISCVAsmParser::parseFPImm. · bfb18058
  Craig Topper authored Mar 07, 2023
  bfb18058
Mar 07, 2023
- [RISCV] Return MatchOperand_ParseFail instead of MatchOperand_NoMatch from parseFPImm. · 6e2ade23
  Craig Topper authored Mar 07, 2023
  6e2ade23
- [SROA] Fix bug where RankVectorTypes is used in std::unique · d888496e
  Han Zhu authored Feb 16, 2023
  d888496e
- [AArch64] Prefer to fold dup into fmul/fma as opposed to ld1r · 9aa39481
  David Green authored Mar 07, 2023
  9aa39481
- [ControlHeightReduction] Freeze potentially poisonous conditions · 912404db
  Kazu Hirata authored Mar 07, 2023
  912404db
- [SLP]Initial support for reshuffling of non-starting buildvector/gather nodes. · a611b3f3
  Alexey Bataev authored Feb 20, 2023
  a611b3f3
- [memprof] Update the isRuntime symbolization check. · bcebadeb
  Snehasish Kumar authored Mar 07, 2023
  bcebadeb
- Split getCompileUnitFor{Data,Code}Address. · 02e8eb1a
  Mitch Phillips authored Mar 07, 2023
  02e8eb1a
- [RISCV] Teach performCombineVMergeAndVOps to combine unmasked TU vpmerge with a masked MU TA op. · 8fa1e5e6
  Craig Topper authored Mar 07, 2023
  8fa1e5e6
- [SCEV] Strengthen nowrap flags via ranges for ARs on construction. · 7019624e
  Florian Hahn authored Mar 07, 2023
  7019624e
- [X86] Lower vector umax(x,1) -> sub(x,cmpeq(x,0)) · 77094802
  Simon Pilgrim authored Mar 07, 2023
  77094802