Commits · fa18005a4c6cfaeffff809f17a41cc94f8674efe · Roger Ferrer / llvm-epi · GitLab

May 04, 2012
- Remove the SubRegClasses field from RegisterClass descriptions. · 796e5272
  Jakob Stoklund Olesen authored May 04, 2012
  796e5272
Mar 30, 2012
- Prefer even-odd D-register pairs. · 2f289737
  Jakob Stoklund Olesen authored Mar 29, 2012
  2f289737
Mar 16, 2012
- ARM vmrs system registers mvfr0 and mvfr1 handling. · 24d90e2d
  Jim Grosbach authored Mar 16, 2012
  24d90e2d
Mar 06, 2012
- Allow the same types in DPair as in QPR. · 579e701f
  Jakob Stoklund Olesen authored Mar 06, 2012
  579e701f
- Split fpscr into two registers: FPSCR and FPSCR_NZCV. · 718cfbe0
  Lang Hames authored Mar 06, 2012
  718cfbe0
Mar 05, 2012
- ARM refactor away a bunch of VLD/VST pseudo instructions. · c988e0c5
  Jim Grosbach authored Mar 05, 2012
  c988e0c5
Feb 18, 2012
- Emacs-tag and some comment fix for all ARM, CellSPU, Hexagon, MBlaze, MSP430,... · b22310fd
  Jia Liu authored Feb 18, 2012
  b22310fd
Feb 02, 2012
- Add pseudo-registers for pairs, triples, and quads of D registers. · caed1c93
  Jakob Stoklund Olesen authored Feb 02, 2012
  caed1c93
- Move ARM subreg index compositions to the SubRegIndex itself. · c7024a48
  Jakob Stoklund Olesen authored Feb 01, 2012
  c7024a48
Jan 18, 2012
- Add a CoveredBySubRegs property to Register descriptions. · f43b5995
  Jakob Stoklund Olesen authored Jan 18, 2012
  f43b5995
Jan 13, 2012
- Use RegisterTuples to generate pseudo-registers. · 35545421
  Jakob Stoklund Olesen authored Jan 13, 2012
  35545421
Dec 19, 2011
- Remove a register class that can just as well be synthesized. · 24159e34
  Jakob Stoklund Olesen authored Dec 19, 2011
  24159e34
Aug 30, 2011
- Change ARM / Thumb2 addc / adde and subc / sube modeling to use physical · e891654a
  Evan Cheng authored Aug 30, 2011
  e891654a
Aug 24, 2011
- Thumb1 ADD/SUB SP instructions are predicable in Thumb2 mode. · 1b8457a8
  Jim Grosbach authored Aug 24, 2011
  1b8457a8
Aug 10, 2011
- Create a new register class for the set of all GPRs except the PC. Use it to... · 042619f9
  Owen Anderson authored Aug 09, 2011
  042619f9
Jul 19, 2011
- ARM assembly parsing of MRS instruction. · 97094d8f
  Jim Grosbach authored Jul 19, 2011
  97094d8f
Jul 01, 2011
- Add support for the 'h' constraint. · f45daac3
  Eric Christopher authored Jun 30, 2011
  f45daac3
Jun 18, 2011
- Switch ARM to using AltOrders instead of MethodBodies. · 831ae010
  Jakob Stoklund Olesen authored Jun 18, 2011
  831ae010
Jun 16, 2011
- Use set operations instead of plain lists to enumerate register classes. · 99f35eab
  Jakob Stoklund Olesen authored Jun 15, 2011
  99f35eab
Jun 03, 2011
- Flag unallocatable register classes instead of giving them empty · 60cdf8e7
  Jakob Stoklund Olesen authored Jun 02, 2011
  60cdf8e7
May 07, 2011
- Eliminate the ARM sub-register indexes that are not needed by the sources. · c1321741
  Jakob Stoklund Olesen authored May 07, 2011
  c1321741
Apr 21, 2011
- As per ARM docs, register Dx is described as DW_OP_regx(256+x) in DWARF. · 46bda61a
  Devang Patel authored Apr 21, 2011
  46bda61a
Apr 20, 2011
- Prefer cheap registers for busy live ranges. · 0e34c1df
  Jakob Stoklund Olesen authored Apr 20, 2011
  0e34c1df
Jan 20, 2011
- Sorry, several patches in one. · b8b0ad80
  Evan Cheng authored Jan 20, 2011
  b8b0ad80
Jan 18, 2011
- Create two new generic classes to represent the following VMRS/VMSR variations: · 2082057b
  Bruno Cardoso Lopes authored Jan 18, 2011
  2082057b
Oct 12, 2010
- PR8359: The ARM backend may end up allocating registers D16 to D31 when · dd6eb5b5
  Bob Wilson authored Oct 12, 2010
  dd6eb5b5
Oct 08, 2010
- Change register allocation order for ARM VFP and NEON registers to put the · 056b694d
  Bob Wilson authored Oct 08, 2010
  056b694d
Sep 02, 2010
- Now that register allocation properly considers reserved regs, simplify the · 66c681a6
  Jim Grosbach authored Sep 02, 2010
  66c681a6
- trivial cleanup · 6f206765
  Jim Grosbach authored Sep 02, 2010
  6f206765
- Simplify the tGPR register class now that the register allocators know not · dffc9d32
  Jim Grosbach authored Sep 01, 2010
  dffc9d32
Aug 17, 2010
- fix emacs language spec's, patch by Edmund Grimley-Evans! · 72a364c1
  Chris Lattner authored Aug 17, 2010
  72a364c1
Aug 10, 2010
- Re-apply r110655 with fixes. Epilogue must restore sp from fp if the function... · 3f251fb2
  Evan Cheng authored Aug 10, 2010
  3f251fb2
- Revert r110655, "Fix ARM hasFP() semantics. It should return true whenever FP · 0dd47bfc
  Daniel Dunbar authored Aug 10, 2010
  0dd47bfc
- Fix ARM hasFP() semantics. It should return true whenever FP register is · 8d5d1c13
  Evan Cheng authored Aug 10, 2010
  8d5d1c13
Jul 30, 2010
- Many Thumb2 instructions can reference the full ARM register set (i.e., · d343166a
  Jim Grosbach authored Jul 30, 2010
  d343166a
Jul 08, 2010
- Clean up a comment. · 6c250434
  Bob Wilson authored Jul 08, 2010
  6c250434
Jun 21, 2010
- Fix PR 7433. Silly typo in non-Darwin ARM tail call · d5c58b76
  Dale Johannesen authored Jun 21, 2010
  d5c58b76
Jun 19, 2010
- Allow ARM if-converter to be run after post allocation scheduling. · 2d51c7c5
  Evan Cheng authored Jun 18, 2010
  2d51c7c5
Jun 16, 2010
- Next round of tail call changes. Register used in a tail · 44f9dfc9
  Dale Johannesen authored Jun 15, 2010
  44f9dfc9
Jun 02, 2010
- Clean up 80 column violations. No functional change. · 84511e15
  Jim Grosbach authored Jun 02, 2010
  84511e15