Commits · fab028b914c64db710c808250873c61d8ff716a2 · Roger Ferrer / llvm-epi · GitLab

Oct 13, 2020
- [InstCombine] visitTrunc - pass through undefs for trunc(shift(trunc/ext(x),c)) patterns · 9c3138bd
  Simon Pilgrim authored Oct 13, 2020
  9c3138bd
- [Analysis] findAffectedValues - remove unused ConstantInt argument. NFCI. · 2e604d23
  Simon Pilgrim authored Oct 13, 2020
  2e604d23
- [GlobalISel] Avoid making G_PTR_ADD with nullptr · 52ba4fa6
  Mirko Brkusanin authored Oct 13, 2020
  52ba4fa6
- [AArch64] Identify SAD pattern · 37dce747
  Vinay Madhusudan authored Oct 13, 2020
  37dce747
- Revert "[VPlan] Use VPValue def for VPMemoryInstructionRecipe." · 710aceb6
  Vitaly Buka authored Oct 13, 2020
  710aceb6
- [AArch64] Implement .variant_pcs directive · c87bd2d8
  Cullen Rhodes authored Oct 08, 2020
  c87bd2d8
- [SVE] Add ISel patterns for "insert undef_nxv#f##, f##, 0" · 981b31c2
  Paul Walker authored Oct 12, 2020
  981b31c2
- [SCEV] BuildConstantFromSCEV(): properly handle SCEVSignExtend from ptr · aaafe350
  Roman Lebedev authored Oct 13, 2020
  aaafe350
- [AMDGPU] v_mac_legacy_f32 does not support DPP · cdf02148
  Jay Foad authored Oct 12, 2020
  cdf02148
- [SCEV] BuildConstantFromSCEV(): properly handle SCEVZeroExtend from ptr · 73246166
  Roman Lebedev authored Oct 13, 2020
  73246166
- [InstCombine] Support uniform vector splats in ((((X >> C) & CC) + Y) << C) folds. · 5df61724
  Simon Pilgrim authored Oct 12, 2020
  5df61724
- [X86][SelectionDAG] Add SADDO_CARRY and SSUBO_CARRY to support multipart... · 1687a8d8
  Craig Topper authored Oct 12, 2020
  1687a8d8
- Reland "[WebAssembly] Emulate v128.const efficiently"" · 72c628e8
  Thomas Lively authored Oct 13, 2020
  72c628e8
- [X86] Add HRESET instruction. · 412cdcf2
  Wang, Pengfei authored Oct 13, 2020
  412cdcf2
- [AMDGPU] Update LiveVariables in convertToThreeAddress() · b215a266
  Ruiling Song authored Oct 09, 2020
  b215a266
- [BitCodeAnalyzer] Add a few missing TYPE_CODES and MODULE_CODE_COMDAT to GetCodeName · a184c758
  Craig Topper authored Oct 12, 2020
  a184c758
Oct 12, 2020
- [TableGen] Add overload of RecordKeeper::getAllDerivedDefinitions() · 350fafab
  Paul C. Anagnostopoulos authored Oct 04, 2020
  350fafab
- Reland "[SCEV] Model ptrtoint(SCEVUnknown) cast not as unknown, but as... · 1fb61042
  Roman Lebedev authored Oct 12, 2020
  1fb61042
- [InstCombine] FoldShiftByConstant - create Scalar/Vector constant with ConstantInt::get(). NFCI. · 4ff71362
  Simon Pilgrim authored Oct 12, 2020
  4ff71362
- [X86] Support -march=x86-64-v[234] · 012dd42e
  Fangrui Song authored Oct 12, 2020
  012dd42e
- [InstCombine] FoldShiftByConstant - create Scalar/Vector constant with ConstantInt::get(). NFCI. · 24dd0cd1
  Simon Pilgrim authored Oct 12, 2020
  24dd0cd1
- [InstCombine] FoldShiftByConstant - merge equivalent types. NFCI. · 2de368f6
  Simon Pilgrim authored Oct 12, 2020
  2de368f6
- Restore "[ThinLTO] Avoid temporaries when loading global decl attachment metadata" · c27ab339
  Teresa Johnson authored Sep 24, 2020
  c27ab339
- [VPlan] Use VPValue def for VPMemoryInstructionRecipe. · 525b085a
  Florian Hahn authored Oct 12, 2020
  525b085a
- Revert 1c021c64 "[SCEV] Model ptrtoint(SCEVUnknown) cast not as unknown, but... · 17cec6a1
  Hans Wennborg authored Oct 12, 2020
  17cec6a1
- [GlobalISel][KnownBits] Early return on out of bound shift amounts · 73411234
  Konstantin Schwarz authored Oct 12, 2020
  73411234
- [NFC][MC] Use MCRegister in LiveRangeMatrix · 43d34799
  Mircea Trofin authored Oct 09, 2020
  43d34799
- [VPlan] Use operands for printing of VPWidenMemoryInstructionRecipe. · ea058d28
  Florian Hahn authored Oct 02, 2020
  ea058d28
- [NFC][Regalloc] Pass VirtRegMap by reference. · 596a9f6b
  Mircea Trofin authored Oct 09, 2020
  596a9f6b
- [LoopDeletion] Remove over-eager SCEV verification. · ad554104
  Florian Hahn authored Oct 12, 2020
  ad554104
- [AMDGPU] Insert waterfall loops for divergent calls · 7f2a641a
  Sebastian Neubauer authored Sep 25, 2020
  7f2a641a
- [SVE] Lower fixed length VECREDUCE_XOR operation · 974ddb54
  Cameron McInally authored Oct 08, 2020
  974ddb54
- [InstCombine] matchFunnelShift - fold or(shl(a,x),lshr(b,sub(bw,x))) ->... · bbf39258
  Simon Pilgrim authored Oct 12, 2020
  bbf39258
- [InstCombine] matchFunnelShift - remove shift value commutation. NFCI. · fa566233
  Simon Pilgrim authored Oct 12, 2020
  fa566233
- [InstCombine] matchFunnelShift - canonicalize to OR(SHL,LSHR). NFCI. · 02295e6d
  Simon Pilgrim authored Oct 12, 2020
  02295e6d
- [NFC] Remove redundant isFullSet checks · 28237c33
  Max Kazantsev authored Oct 12, 2020
  28237c33
- [DAG][ARM][MIPS][RISCV] Improve funnel shift promotion to use 'double shift' patterns · c252200e
  Simon Pilgrim authored Oct 12, 2020
  c252200e
- [VE] Support copysign math function · 66be2e00
  Kazushi (Jam) Marukawa authored Oct 11, 2020
  66be2e00
- Revert rGb97093e520036f8 - "[InstCombine] matchFunnelShift - fold... · 45d785e2
  Simon Pilgrim authored Oct 12, 2020
  45d785e2
- [VE] Support fneg and frem · 9d6d4b07
  Kazushi (Jam) Marukawa authored Oct 11, 2020
  9d6d4b07