Commits · fabe52a7412d850bf06e006db1d53de0500a1853 · Roger Ferrer / llvm-epi · GitLab

Feb 18, 2020
- [NFC] Remove trailing space · 466f8843
  Jim Lin authored Feb 18, 2020
  466f8843
Jan 24, 2020
- Resubmit: [DA][TTI][AMDGPU] Add option to select GPUDA with TTI · c2266463
  Austin Kerbow authored Jan 20, 2020
  c2266463
Jan 22, 2020
- Revert "[DA][TTI][AMDGPU] Add option to select GPUDA with TTI" · cd470717
  Nico Weber authored Jan 22, 2020
  cd470717
- [DA][TTI][AMDGPU] Add option to select GPUDA with TTI · a90a6502
  Austin Kerbow authored Jan 20, 2020
  a90a6502
Dec 18, 2019
- [NFC][TTI] Add Alignment for isLegalMasked[Gather/Scatter] · 7cd1cfdd
  Anna Welker authored Dec 18, 2019
  7cd1cfdd
Dec 12, 2019
- Rename TTI::getIntImmCost for instructions and intrinsics · 85ba5f63
  Reid Kleckner authored Dec 11, 2019
  85ba5f63
Dec 09, 2019
- [ARM] Teach the Arm cost model that a Shift can be folded into other instructions · be7a1070
  David Green authored Dec 08, 2019
  be7a1070
Nov 14, 2019
- Sink all InitializePasses.h includes · 05da2fe5
  Reid Kleckner authored Nov 13, 2019
  05da2fe5
Nov 06, 2019
- [TTI][LV] preferPredicateOverEpilogue · 6c2a4f5f
  Sjoerd Meijer authored Nov 06, 2019
  6c2a4f5f
Oct 31, 2019
- [PGO][PGSO] TargetLowering/TargetTransformationInfo/SwitchLoweringUtils part. · 0d987e41
  Hiroshi Yamauchi authored Oct 29, 2019
  0d987e41
Oct 25, 2019
- [Alignment][NFC] getMemoryOpCost uses MaybeAlign · a4783ef5
  Guillaume Chatelet authored Oct 22, 2019
  a4783ef5
Oct 14, 2019
- [NFC][TTI] Add Alignment for isLegalMasked[Load/Store] · 527a35e1
  Sam Parker authored Oct 14, 2019
  527a35e1
Oct 12, 2019
- recommit: [LoopVectorize][PowerPC] Estimate int and float register pressure... · 9802268a
  Zi Xuan Wu authored Oct 12, 2019
  9802268a
Oct 10, 2019
- [System Model] [TTI] Move default cache/prefetch implementations · 7c562f12
  David Greene authored Oct 10, 2019
  7c562f12
Oct 09, 2019
- [System Model] [TTI] Update cache and prefetch TTI interfaces · 2e6f6b4d
  David Greene authored Oct 09, 2019
  2e6f6b4d
Oct 08, 2019
- Revert "[LoopVectorize][PowerPC] Estimate int and float register pressure... · 9912232b
  Jinsong Ji authored Oct 08, 2019
  9912232b
- [LoopVectorize][PowerPC] Estimate int and float register pressure separately in loop-vectorize · 9f41decc
  Zi Xuan Wu authored Oct 08, 2019
  9f41decc
Oct 07, 2019
- Revert "[SLP] avoid reduction transform on patterns that the backend can load-combine" · dfc1aee2
  Martin Storsjö authored Oct 07, 2019
  dfc1aee2
Oct 05, 2019
- [SLP] avoid reduction transform on patterns that the backend can load-combine · e2321bb4
  Sanjay Patel authored Oct 05, 2019
  e2321bb4
Oct 01, 2019
- [NFC][HardwareLoops] Update some iterators · 95aee9da
  Sam Parker authored Oct 01, 2019
  95aee9da
Sep 27, 2019
- [Alignment][NFC] Remove unneeded llvm:: scoping on Align types · 18f805a7
  Guillaume Chatelet authored Sep 27, 2019
  18f805a7
Sep 16, 2019
- [NFC] remove unused functions · 98cb8db8
  Guillaume Chatelet authored Sep 16, 2019
  98cb8db8
Sep 05, 2019
- [LLVM][Alignment] Convert isLegalNTStore/isLegalNTLoad to llvm::Align · 33671cef
  Guillaume Chatelet authored Sep 05, 2019
  33671cef
Aug 29, 2019
- [CostModel] Model all `extractvalue`s as free. · cc95a45f
  Roman Lebedev authored Aug 29, 2019
  cc95a45f
Aug 14, 2019
- InferAddressSpaces: Move target intrinsic handling to TTI · dbc1f207
  Matt Arsenault authored Aug 14, 2019
  dbc1f207
Jul 17, 2019
- [AMDGPU] Tune inlining parameters for AMDGPU target · d912a9ba
  Daniil Fukalov authored Jul 17, 2019
  d912a9ba
Jul 09, 2019
- Revert "[HardwareLoops] NFC - move hardware loop checking code to isHardwareLoopProfitable()" · 06fef0b3
  Jinsong Ji authored Jul 09, 2019
  06fef0b3
- [HardwareLoops] NFC - move hardware loop checking code to isHardwareLoopProfitable() · d9555730
  Chen Zheng authored Jul 09, 2019
  d9555730
Jul 03, 2019
- [PowerPC] exclude ICmpZero in LSR if icmp can be replaced in later hardware loop. · dfdccbb2
  Chen Zheng authored Jul 03, 2019
  dfdccbb2
Jun 26, 2019
- [HardwareLoops] NFC - move loop with irreducible control flow checking logic to HarewareLoopInfo. · aa999528
  Chen Zheng authored Jun 26, 2019
  aa999528
- [HardwareLoops] NFC - move loop with irreducible control flow checking logic... · 46ce9e4f
  Chen Zheng authored Jun 26, 2019
  46ce9e4f
Jun 25, 2019
- [ExpandMemCmp] Move all options to TargetTransformInfo. · 3bc5ad55
  Clement Courbet authored Jun 25, 2019
  3bc5ad55
Jun 19, 2019
- [NFC] move some hardware loop checking code to a common place for other using. · c5b918de
  Chen Zheng authored Jun 19, 2019
  c5b918de
Jun 18, 2019
- [GlobalISel][Localizer] Rewrite localizer to run in 2 phases, inter & intra block. · 14688224
  Amara Emerson authored Jun 17, 2019
  14688224
Jun 17, 2019
- [LV] Suppress vectorization in some nontemporal cases · 6452bdd2
  Warren Ristow authored Jun 17, 2019
  6452bdd2
Jun 07, 2019
- [CodeGen] Generic Hardware Loop Support · c5ef502e
  Sam Parker authored Jun 07, 2019
  c5ef502e
May 28, 2019
- [CostModel] Add really basic support for being able to query the cost of the FNeg instruction. · 50d50282
  Craig Topper authored May 28, 2019
  50d50282
Apr 30, 2019
- [ARM] Implement TTI::getMemcpyCost · ea31ddb3
  Sjoerd Meijer authored Apr 30, 2019
  ea31ddb3
Mar 21, 2019
- [ScalarizeMaskedMemIntrin] Add support for scalarizing expandload and compressstore intrinsics. · 9f0b17a2
  Craig Topper authored Mar 21, 2019
  9f0b17a2
Mar 12, 2019
- [TTI] Enable analysis of clib functions in getIntrinsicCosts. NFCI. · 31ff647c
  Sjoerd Meijer authored Mar 12, 2019
  31ff647c