Commits · fb1ce5fa258b4fb54c7f3b0ae5ab38382930e403 · Roger Ferrer / llvm-epi · GitLab

Mar 28, 2013
- Testing commit access to llvm. Remove two lines of whitespace from the Thumb README. · fb1ce5fa
  Gordon Keiser authored Mar 28, 2013
  fb1ce5fa
- Hexagon: Use multiclass for gp-relative instructions. · 93e74048
  Jyotsna Verma authored Mar 28, 2013
  93e74048
- AArch64: implement GICv3 system registers · 08bb3ce3
  Tim Northover authored Mar 28, 2013
  08bb3ce3
- Add the PPC64 popcntd instruction · a4d07486
  Hal Finkel authored Mar 28, 2013
  a4d07486
- Cleanup PPC CR-spill kill flags and 32- vs. 64-bit instructions · 035b4825
  Hal Finkel authored Mar 28, 2013
  035b4825
- Fix typo in PPCInstr64Bit · 25aab010
  Hal Finkel authored Mar 28, 2013
  25aab010
- This patch follows is a follow up to r178171, which uses the register · d6be4bf8
  Preston Gurd authored Mar 27, 2013
  d6be4bf8
Mar 27, 2013
- [ms-inline asm] Add support of imm displacement before bracketed memory · 1530ba5e
  Chad Rosier authored Mar 27, 2013
  1530ba5e
- Resynchronize isLoadFromStackSlot with LoadRegFromStackSlot (and stores) in PPCInstrInfo · 37714b8a
  Hal Finkel authored Mar 27, 2013
  37714b8a
- · 663e6f95
  Preston Gurd authored Mar 27, 2013
  663e6f95
- Fix typo (common to both X86 and PPC) · 1996f3d8
  Hal Finkel authored Mar 27, 2013
  1996f3d8
- Remove more dead LR-as-GPR PPC code · 5791f514
  Hal Finkel authored Mar 27, 2013
  5791f514
- Remove "gpr0 allocation" from the PPC README TODO list · f1af79ab
  Hal Finkel authored Mar 27, 2013
  f1af79ab
- R600/SI: add SETO/SETUO patterns · 08f59299
  Christian Konig authored Mar 27, 2013
  08f59299
- Print PPC ZERO as 0 (not r0) even on Darwin · 68714355
  Hal Finkel authored Mar 27, 2013
  68714355
- Switch to LLVM support function abs64 to keep VS2008 happy. · d3490dc0
  Tim Northover authored Mar 27, 2013
  d3490dc0
- Enabling the generation of dependency breakers for partial updates on... · dc45336d
  Silviu Baranga authored Mar 27, 2013
  dc45336d
- Hexagon: Disable optimizations at O0. · 653d8839
  Jyotsna Verma authored Mar 27, 2013
  653d8839
- R600/SI: add cummuting of rev instructions · 3c14580a
  Christian Konig authored Mar 27, 2013
  3c14580a
- R600/SI: add mulhu/mulhs patterns · 70a5032c
  Christian Konig authored Mar 27, 2013
  70a5032c
- R600/SI: add srl/sha patterns for SI · 20a7e6b7
  Christian Konig authored Mar 27, 2013
  20a7e6b7
- Allocate r0 on PPC · 0f77861d
  Hal Finkel authored Mar 27, 2013
  0f77861d
- Use the PPC no-r0 class on the TOC LD pseudos · 573fc28d
  Hal Finkel authored Mar 27, 2013
  573fc28d
- Apply the no-r0 register class to the PPC SELECT_CC_I[4|8] pseudos · 3fa362a5
  Hal Finkel authored Mar 27, 2013
  3fa362a5
- Apply the no-r0 class to PPC TOC ADDI[S] pseudo instructions · 42a312b2
  Hal Finkel authored Mar 27, 2013
  42a312b2
- Remove the link register from the GPR classes on PowerPC. · a1b72d0f
  Bill Schmidt authored Mar 27, 2013
  a1b72d0f
- Don't spill PPC VRSAVE on non-Darwin (even in SjLj) · a7b0630b
  Hal Finkel authored Mar 27, 2013
  a7b0630b
Mar 26, 2013
- Add XTEST codegen support · 03f9ad0e
  Michael Liao authored Mar 26, 2013
  03f9ad0e
- Add HLE target feature · e344ec91
  Michael Liao authored Mar 26, 2013
  e344ec91
- Enable SandyBridgeModel for all modern Intel P6 descendants. · 1ac7e662
  Jakob Stoklund Olesen authored Mar 26, 2013
  1ac7e662
- Restore real bit lengths on PPC register numbers · 567fa62d
  Hal Finkel authored Mar 26, 2013
  567fa62d
- PPC: Use HWEncoding and TRI->getEncodingValue · feea6539
  Hal Finkel authored Mar 26, 2013
  feea6539
- R600/SIMCCodeEmitter.cpp: Prune a couple of unused members, STI and Ctx. [-Wunused-private-field] · 3234178b
  NAKAMURA Takumi authored Mar 26, 2013
  3234178b
- Use multiple virtual registers in PPC CR spilling · 0dfbb05a
  Hal Finkel authored Mar 26, 2013
  0dfbb05a
- Update PPCRegisterInfo's use of virtual registers to be SSA · d8a423cd
  Hal Finkel authored Mar 26, 2013
  d8a423cd
- Annotate the remaining x86 instructions with SchedRW lists. · e440d476
  Jakob Stoklund Olesen authored Mar 26, 2013
  e440d476
- Annotate x87 and mmx instructions with SchedRW lists. · 267dd946
  Jakob Stoklund Olesen authored Mar 26, 2013
  267dd946
- Annotate control instructions with SchedRW lists. · d59419eb
  Jakob Stoklund Olesen authored Mar 26, 2013
  d59419eb
- Annotate the rest of X86InstrInfo.td with SchedRW lists. · 7c8a760d
  Jakob Stoklund Olesen authored Mar 26, 2013
  7c8a760d
- Add PREFETCHW codegen support · 5173ee03
  Michael Liao authored Mar 26, 2013
  5173ee03