Commits · fb9d67636ae06c02f2235ad2ff5826599c86eaf9 · Roger Ferrer / llvm-epi · GitLab

Aug 31, 2022
- [LoongArch] Support floating-point number reciprocal · fb9d6763
  gonglingqin authored Aug 31, 2022
  fb9d6763
- [DirectX backend] change MinVectorRegisterBitWidth to 32. · 6917799e
  Xiang Li authored Aug 28, 2022
  6917799e
- [RISCV] Add cost model for select and integer compare instructions. · 45c1ce32
  Jianjian GUAN authored Aug 20, 2022
  45c1ce32
- [RISCV][test] Add cost model coverage for compare instructions. · 4fd53fd8
  Jianjian GUAN authored Aug 29, 2022
  4fd53fd8
- [InstCombine] add support for multi-use Y of (X op Y) op Z --> (Y op Z) op X · 35a3048c
  Chenbing Zheng authored Aug 31, 2022
  35a3048c
- [AtomicExpand] Make floating point conversion happens before fence insertion · ad2f7fd2
  Kai Luo authored Aug 31, 2022
  ad2f7fd2
- [GlobalISel] Explicitly fail trying to translate `gc.statepoint` and related intrinsics · 2fdf963d
  Markus Böck authored Aug 31, 2022
  2fdf963d
Aug 30, 2022
- [NFC] Move a test case across files. · 4df696fb
  Mingming Liu authored Aug 19, 2022
  4df696fb
- [SLP]Fix PR57447: Assertion `!getTreeEntry(V) && "Scalar already in tree!"' failed. · ec06df94
  Alexey Bataev authored Aug 30, 2022
  ec06df94
- [RISCV] Improve isel of AND with shiftedMask containing 32 leading zeros and some trailing zeros. · 893f5e95
  Craig Topper authored Aug 30, 2022
  893f5e95
- [AMDGPU] Limit TID / wavefrontsize uniformness to 1D kernels · fd1f8c85
  Stanislav Mekhanoshin authored Aug 29, 2022
  fd1f8c85
- [AMDGPU] Precommit two tests showing missed combines to v_med3 · f9433161
  Justin Bogner authored Aug 30, 2022
  
  f9433161
- [InstCombine] add tests for xor-of-ctlz/cttz; NFC · 16e96a7e
  Sanjay Patel authored Aug 30, 2022
  
  16e96a7e
- [InstCombine] add tests for signbit test using lshr; NFC · 67cbd25d
  Sanjay Patel authored Aug 29, 2022
  
  67cbd25d
- [SVE] Fix SVEDup0 matching -0.0f · 40999cbd
  Stephen Long authored Aug 30, 2022
  40999cbd
- [NFC][AArch64] Specify datalayout explicitly for cast.ll and · 3785234b
  Mingming Liu authored Aug 29, 2022
  3785234b
- [BasicBlockUtils] Amend test for loop metadata. · 3d5ea539
  Hendrik Greving authored May 24, 2022
  3d5ea539
- [CostModel][X86] Account for add/sub 512-bit vector splitting costs on non-AVX512BW targets · 78304450
  Simon Pilgrim authored Aug 30, 2022
  
  78304450
- [NFC][LoopLoadElim] Extending type-mismatch testing · 92c41727
  Jolanta Jensen authored Aug 19, 2022
  92c41727
- [llvm-size] Fix missing file name for darwin output format with non-Mach-O · 25fdcb8e
  Shivam Gupta authored Aug 30, 2022
  25fdcb8e
- [llvm-otool] Print dyld_info output before chained_fixup output · b9d63e10
  Nico Weber authored Aug 29, 2022
  b9d63e10
- [amdgpu][nfc] Add test case showing false aliasing in LDS lowering · 9b0b912e
  Jon Chesterfield authored Aug 30, 2022
  
  9b0b912e
- [AMDGPU][MC][GFX11][NFC] Update asm tests for VOP3P instructions · f4319bcb
  Dmitry Preobrazhensky authored Aug 30, 2022
  f4319bcb
- [AMDGPU][MC][GFX11][NFC] Add tests for opcode promotions and forced suffices · 8bd92c83
  Dmitry Preobrazhensky authored Aug 30, 2022
  8bd92c83
- [AMDGPU][MC][GFX11][NFC] Add missing asm tests for VOPC and VOPC.DPP instructions · 5c58e533
  Dmitry Preobrazhensky authored Aug 30, 2022
  5c58e533
- [AMDGPU][MC][GFX11][NFC] Update asm tests for VOPC instructions promoted to VOP3 · 3ef5751e
  Dmitry Preobrazhensky authored Aug 30, 2022
  3ef5751e
- [AMDGPU][MC][GFX11][NFC] Update asm tests for VOP3 instructions · b65d3eea
  Dmitry Preobrazhensky authored Aug 30, 2022
  b65d3eea
- [InstCombine] Distributive or+mul with const operand · 23a5de42
  zhongyunde authored Aug 30, 2022
  23a5de42
- [DSE] Support looking through memory phis at end of function. · b5e208fc
  Florian Hahn authored Aug 30, 2022
  b5e208fc
- [NFC][AMDGPU] Pre-commit tests for D132837. · d26dd371
  Thomas Symalla authored Aug 30, 2022
  d26dd371
- [GVN] Regenerate test checks (NFC) · 07bfbce9
  Nikita Popov authored Aug 30, 2022
  
  07bfbce9
- [AArch64][GISel] constrain regclass for 128->64 copy · 050dad57
  Tomas Matheson authored Aug 23, 2022
  050dad57
- [AArch64][GISel] fix G_ADD*/G_SUB* legalization · 9a390d66
  Tomas Matheson authored Aug 23, 2022
  9a390d66
- [DebugInfo] Fix line number attribution in mldst-motion · 84a71d52
  OCHyams authored Aug 30, 2022
  84a71d52
- [PowerPC] CTRLoop pseudo instructions should not be duplicated · 710923cd
  Ting Wang authored Aug 30, 2022
  710923cd
- [NFC][PowerPC] Add test case to show ctrloop mi shall not be duplicated · f908cbc3
  Ting Wang authored Aug 30, 2022
  f908cbc3
- [InstCombine] fold fake floating point vector extract to shift+trunc. · df525c77
  Jianjian GUAN authored Aug 26, 2022
  df525c77
- [LegalizeTypes] Support widen result for VECTOR_REVERSE. · e2bb9774
  wanglian authored Aug 22, 2022
  e2bb9774
- [InstCombine] Precommit test for D125750. · f98153ea
  Jianjian GUAN authored Aug 26, 2022
  f98153ea
- [llvm] [Debuginfod] Remove `llvm-debuginfod-find` lit tests that used python http server. · 038b9ed3
  Noah Shutty authored Aug 30, 2022
  038b9ed3