Commits · fc096c98f389b3d8813e72e1ea3c38d1a2e567d4 · Roger Ferrer / llvm-epi · GitLab

Dec 23, 2014
- [PowerPC] Ensure that the TOC reload directly follows bctrl on PPC64 · fc096c98
  Hal Finkel authored Dec 23, 2014
  fc096c98
- [Hexagon] Reapplying 224775 load words. · 026e88d3
  Colin LeMahieu authored Dec 23, 2014
  026e88d3
- Reverting 224775 until mayLoad flag is addressed. · 20be1571
  Colin LeMahieu authored Dec 23, 2014
  20be1571
- [Hexagon] Adding word loads. · 122aeaaf
  Colin LeMahieu authored Dec 23, 2014
  122aeaaf
- AVX-512: Added FMA instructions, intrinsics an tests for KNL and SKX targets · fcea06ac
  Elena Demikhovsky authored Dec 23, 2014
  fcea06ac
- [PowerPC] Don't mark the return-address slot as immutable · 6e27c6d4
  Hal Finkel authored Dec 23, 2014
  6e27c6d4
- AVX-512: BLENDM - fixed encoding of the broadcast version · 3121449f
  Elena Demikhovsky authored Dec 23, 2014
  3121449f
- [DagCombine] Improve DAGCombiner BUILD_VECTOR when it has two sources of elements · f4536ea6
  Michael Kuperstein authored Dec 23, 2014
  f4536ea6
- [PowerPC] Don't attempt a 64-bit pow2 division on PPC32 · 04b16b51
  Hal Finkel authored Dec 23, 2014
  04b16b51
- [ARM] Don't break alignment when combining base updates into load/stores. · 4553bff4
  Ahmed Bougacha authored Dec 23, 2014
  4553bff4
- X86: Don't over-align combined loads. · 1bd0f353
  Jim Grosbach authored Dec 23, 2014
  1bd0f353
- Make musttail more robust for vector types on x86 · ce009334
  Reid Kleckner authored Dec 22, 2014
  ce009334
Dec 22, 2014
- [Hexagon] Adding memb instruction. Fixing whitespace in test from 224730. · 4b1eac4d
  Colin LeMahieu authored Dec 22, 2014
  4b1eac4d
- [x86] Add vector @llvm.ctpop intrinsic custom lowering · 811c1735
  Bruno Cardoso Lopes authored Dec 22, 2014
  811c1735
- [CodeGenPrepare] Handle properly the promotion of operands when this does not · 84f89ccd
  Quentin Colombet authored Dec 22, 2014
  84f89ccd
- AVX-512: Added all forms of BLENDM instructions, · 949b0d46
  Elena Demikhovsky authored Dec 22, 2014
  949b0d46
- Lower multiply-negate operation to mneg on AArch64 · bf662901
  Karthik Bhat authored Dec 22, 2014
  bf662901
- Convert a few tests to FileCheck. NFC. · 2645d339
  Rafael Espindola authored Dec 22, 2014
  2645d339
Dec 21, 2014
- Enable (sext x) == C --> x == (trunc C) combine · 22b4c256
  Matt Arsenault authored Dec 21, 2014
  22b4c256
Dec 20, 2014
- [x86] Change the test added in r223774 to first check the spelling of · b07d8365
  Chandler Carruth authored Dec 20, 2014
  b07d8365
- Masked load and store codegen - fixed 128-bit vectors · fb73ca51
  Elena Demikhovsky authored Dec 19, 2014
  fb73ca51
- R600/SI: Only form min/max with 1 use. · dc103075
  Matt Arsenault authored Dec 19, 2014
  dc103075
Dec 19, 2014
- Add the ExceptionHandling::MSVC enumeration · 93acac6c
  Reid Kleckner authored Dec 19, 2014
  93acac6c
- Model sqrtss as a binary operation with one source operand tied to the destination (PR14221) · 1da5f164
  Sanjay Patel authored Dec 19, 2014
  1da5f164
- R600/SI: Make sure non-inline constants aren't folded into mubuf soffset operand · c3d7eeb6
  Tom Stellard authored Dec 19, 2014
  c3d7eeb6
- CodeGen: do not attempt to invalidate virtual registers for zero-sized phis. · 0e5c0685
  Peter Collingbourne authored Dec 19, 2014
  0e5c0685
- merge consecutive stores of extracted vector elements · 0428a578
  Sanjay Patel authored Dec 19, 2014
  0428a578
Dec 18, 2014
- [mips][microMIPS] Fix bugs related to atomic SC/LL instructions · 2f27d571
  Jozef Kolek authored Dec 18, 2014
  2f27d571
- [mips] Clean up the CodeGen/Mips/inlineasmmemop.ll test. NFC. · 83cd33c4
  Toma Tabacu authored Dec 18, 2014
  83cd33c4
- [AVX512] Enable FP arithmetic lowering for AVX512VL subsets. · 79fb7292
  Robert Khasanov authored Dec 18, 2014
  79fb7292
- Add a new string member to the TargetOptions struct for the name · 661f2d1c
  Eric Christopher authored Dec 18, 2014
  661f2d1c
- Model ARM backend ABI selection after the front end code doing the · 1971c350
  Eric Christopher authored Dec 18, 2014
  1971c350
Dec 17, 2014
- R600/SI: Fix f64 inline immediates · 303011a0
  Matt Arsenault authored Dec 17, 2014
  303011a0
- [NVPTX] Fix bugs related to isSingleValueType · e4c9cf04
  Jingyue Wu authored Dec 17, 2014
  e4c9cf04
- Fix CR/LF line endings in test case · 44ee1c0e
  Timur Iskhodzhanov authored Dec 17, 2014
  44ee1c0e
- [DAGCombine] Slightly improve lowering of BUILD_VECTOR into a shuffle. · 047b1a04
  Michael Kuperstein authored Dec 17, 2014
  047b1a04
- [mips] Set GCC-compatible MIPS asssembler options before inline asm blocks. · a23f13c3
  Toma Tabacu authored Dec 17, 2014
  a23f13c3
- [CodeGenPrepare] Reapply r224351 with a fix for the assertion failure: · fc2201e9
  Quentin Colombet authored Dec 17, 2014
  fc2201e9
- Revert "[CodeGenPrepare] Move sign/zero extensions near loads using type promotion." · 04b69f89
  Reid Kleckner authored Dec 17, 2014
  04b69f89
- SelectionDAG switch lowering: use 'unsigned' to count destination popularity · 224cb82a
  Hans Wennborg authored Dec 16, 2014
  224cb82a