Commits · fd09f12f32f57564d619a28b8826d33ade47b12e · Roger Ferrer / llvm-epi · GitLab

Jan 31, 2020
- Implement -fsemantic-interposition · fd09f12f
  serge-sans-paille authored Jan 16, 2020
  fd09f12f
- [AArch64][SVE] Add remaining SVE2 intrinsics for uniform DSP operations · 69558c84
  Kerry McLaughlin authored Jan 31, 2020
  69558c84
- [Support] Wrap extern TLS variable in getter function · 3f6a2f1e
  Markus Böck authored Jan 31, 2020
  3f6a2f1e
- [DWARF] Add support for 64-bit DWARF in .debug_names. · 16a0313e
  Igor Kudrin authored Jan 15, 2020
  16a0313e
- [GISel][KnownBits] Fix a bug where we could run out of stack space · cfebd777
  Quentin Colombet authored Jan 30, 2020
  cfebd777
- [X86][ELF] Prefer to lower MC_GlobalAddress operands to .Lfoo$local · 5b22bcc2
  Fangrui Song authored Jan 22, 2020
  5b22bcc2
- [SafeStack][DebugInfo] Insert DW_OP_deref in correct location · 2d3174c4
  Leonard Chan authored Jan 30, 2020
  2d3174c4
- [GlobalISel][IRTranslator] When translating vector geps, splat the base pointer if required. · 84bd8511
  Amara Emerson authored Jan 30, 2020
  84bd8511
- Revert "[SafeStack][DebugInfo] Insert DW_OP_deref in correct location" · 3b23453b
  Leonard Chan authored Jan 30, 2020
  3b23453b
- [SafeStack][DebugInfo] Insert DW_OP_deref in correct location · fff6a1b0
  Leonard Chan authored Jan 28, 2020
  fff6a1b0
- Revert "AMDGPU: Cleanup and fix SMRD offset handling" · 6a4acb9d
  Matt Arsenault authored Jan 30, 2020
  6a4acb9d
- AMDGPU: Cleanup and fix SMRD offset handling · 17dbc661
  Matt Arsenault authored Jan 30, 2020
  17dbc661
- CodeGen: Use Register · eb7f74e3
  Matt Arsenault authored Jan 30, 2020
  
  eb7f74e3
Jan 30, 2020
- [AArch64][GlobalISel] Fold in G_ANYEXT/G_ZEXT into TB(N)Z · c8c987d3
  Jessica Paquette authored Jan 29, 2020
  c8c987d3
- [AArch64][GlobalISel] Disallow vectors in convertPtrAddToAdd. · 6170272a
  Amara Emerson authored Jan 30, 2020
  6170272a
- [InstCombine] Remove unnecessary worklist add; NFCI · 48039103
  Nikita Popov authored Jan 30, 2020
  48039103
- AMDGPU: Replace subtarget check with an assert · f7521dc2
  Matt Arsenault authored Jan 29, 2020
  f7521dc2
- AMDGPU: Don't use separate cache arguments for s_buffer_load node · 97a1d4bc
  Matt Arsenault authored Jan 29, 2020
  97a1d4bc
- [InstCombine] Remove unnecessary worklist add; NFCI · 90b5ed99
  Nikita Popov authored Jan 30, 2020
  90b5ed99
- [InstCombine] Create new insts in foldICmpEqIntrinsicWithConstant; NFCI · cad91074
  Nikita Popov authored Jan 30, 2020
  cad91074
- [AMDGPU] Add file headers for few files where it is missing. · 1d9e08ec
  hsmahesha authored Jan 31, 2020
  1d9e08ec
- [AIX] Minor cleanup in AsmPrinter. [NFC] · 8b737688
  Sean Fertile authored Jan 30, 2020
  8b737688
- [AArch64] -fpatchable-function-entry=N,0: place patch label after BTI · 06b8e32d
  Fangrui Song authored Jan 29, 2020
  06b8e32d
- [ConstantFold][SVE] Fix constant folding for scalable vector unary operations. · 34e6552d
  Huihui Zhang authored Jan 30, 2020
  34e6552d
- [AArch64][SVE] Add remaining SVE2 mla indexed intrinsics. · 0610637a
  Danilo Carvalho Grael authored Jan 29, 2020
  0610637a
- [ThinLTO] Disable "Always import constants" due to compile time issues · c45bb326
  Teresa Johnson authored Jan 30, 2020
  c45bb326
- [LoopFusion] Move instructions from FC1.GuardBlock to FC0.GuardBlock and · e44f4a8a
  Whitney Tsang authored Jan 30, 2020
  e44f4a8a
- [AArch64][ARM] Always expand ordered vector reductions (PR44600) · 70d345e6
  Nikita Popov authored Jan 21, 2020
  70d345e6
- [BPF] fix a bug in BPFMISimplifyPatchable pass with -O0 · 795bbb36
  Yonghong Song authored Jan 29, 2020
  795bbb36
- [XCOFF][AIX] Support basic relocation type on AIX · 3bbe7a68
  jasonliu authored Jan 30, 2020
  3bbe7a68
- [PowerPC][Future] Branch Distance Estimation For Prefixed Instructions · 9de1241b
  Stefan Pintilie authored Jan 30, 2020
  9de1241b
- [InstCombine][DebugInfo] Fold constants wrapped in metadata · b54a8ec1
  David Stenberg authored Jan 30, 2020
  b54a8ec1
- AMDGPU/GlobalISel: Don't use pointless getConstantVRegVal · d6b83d6b
  Matt Arsenault authored Jan 30, 2020
  d6b83d6b
- Fix helptext for opt/llc after 14fc20ca · 6cc6e89c
  Nemanja Ivanovic authored Jan 30, 2020
  6cc6e89c
- [FPEnv][AArch64] Add lowering and instruction selection for strict conversions · 0bb9a27c
  John Brawn authored Jan 27, 2020
  0bb9a27c
- GlobalISel: Implement s32->s64 G_FPTOSI lowering · ea956685
  Matt Arsenault authored Jan 04, 2020
  ea956685
- AMDGPU/GlobalISel: Handle s64->s64 G_FPTOSI/G_FPTOUI · b21571f4
  Matt Arsenault authored Jan 04, 2020
  
  b21571f4
- AMDGPU/GlobalISel: Custom lower G_LOG/G_LOG10 · 8184176e
  Matt Arsenault authored Jan 21, 2020
  8184176e
- AMDGPU/GlobalISel: Legalize unpacked d16 image operations · 872e899b
  Matt Arsenault authored Jan 15, 2020
  872e899b
- AMDGPU/GlobalISel: Only map VOP operands to VGPRs · d21182d6
  Matt Arsenault authored Jan 13, 2020
  d21182d6