Commits · fd184c062c1a1b4727ddf0452ebab11fb8834880 · Roger Ferrer / llvm-epi · GitLab

May 13, 2021
- [TSAN] Honor failure memory orders in AtomicCAS · fd184c06
  Bruno Cardoso Lopes authored May 13, 2021
  fd184c06
- Revert "[SimpleLoopUnswitch] Port partially invariant unswitch from... · 107d19eb
  Jingu Kang authored May 13, 2021
  107d19eb
- [FPEnv][X86] Implement lowering of llvm.set.rounding · 12537ab7
  Serge Pavlov authored May 13, 2021
  12537ab7
- [gn build] Port d8b37de8 · 9bf17619
  LLVM GN Syncbot authored May 13, 2021
  
  9bf17619
- [GC][NFC] Move GCStrategy from CodeGen to IR · d8b37de8
  Max Kazantsev authored May 12, 2021
  d8b37de8
- [JITLink] Expose x86-64 pointer jump stub block construction. · 2f21a272
  Lang Hames authored May 12, 2021
  2f21a272
- [JITLink] Add a transferDefinedSymbol operation. · 4b0f5edd
  Lang Hames authored May 12, 2021
  4b0f5edd
- [Coroutines] Salvege Debug.values · c1359ef0
  Chuanqi Xu authored May 13, 2021
  c1359ef0
- [Coroutines] Enable printing coroutine frame when dbg info is available · 6e5b8f48
  Chuanqi Xu authored May 13, 2021
  6e5b8f48
- [SLP] Add insertelement instructions to vectorizable tree · ab2c499d
  Anton Afanasyev authored Mar 16, 2021
  ab2c499d
- [SLP][Test] Fix and precommit tests for D98714 · cd909003
  Anton Afanasyev authored Mar 19, 2021
  
  cd909003
- [SLP][Test] Fix and precommit tests for D98714 · 00a0595b
  Anton Afanasyev authored Mar 19, 2021
  
  00a0595b
- [Debug-Info] add -gstrict-dwarf support in backend · a0ca4c46
  Chen Zheng authored May 09, 2021
  a0ca4c46
- [AMDGPU] Refactor shouldExpandAtomicRMWInIR(). NFC. · bd00106d
  Stanislav Mekhanoshin authored May 12, 2021
  bd00106d
- Change the context instruction for computeKnownBits in LoadStoreVectorizer pass · e7d26ace
  Justin Bogner authored May 12, 2021
  e7d26ace
- Optimize GSymCreator::finalize. · e5bdacba
  Greg Clayton authored May 12, 2021
  e5bdacba
May 12, 2021
- [lld][WebAssembly] Allow data symbols to extend past end of segment · cd01430f
  Sam Clegg authored May 11, 2021
  cd01430f
- [WebAssembly] Add TLS data segment flag: WASM_SEG_FLAG_TLS · 3041b16f
  Sam Clegg authored May 10, 2021
  3041b16f
- [WebAssembly] Allow Wasm EH with Emscripten SjLj · ba38b72e
  Heejin Ahn authored May 12, 2021
  ba38b72e
- [RISCV] Remove RISCVII:VSEW enum. Make encodeVYPE operate directly on SEW. · 9c345407
  Craig Topper authored May 12, 2021
  9c345407
- [cmake] Fix typo in function name · 77997f28
  Shoaib Meenai authored May 12, 2021
  77997f28
- [InstCombine] Support one-hot merge for logical and/or · a8f7dee1
  Nikita Popov authored May 11, 2021
  a8f7dee1
- [PhaseOrdering] Add test for missing vectorization with NewPM. · ed9e1a7d
  Florian Hahn authored May 12, 2021
  
  ed9e1a7d
- [SCEV] Add loop-guard pessimizing test with step = 2. · 96c1fa2a
  Florian Hahn authored May 12, 2021
  
  96c1fa2a
- [LoopFlatten] Simplify loops so that the pass can operate on unsimplified loops. · 1124ad2f
  Stelios Ioannou authored May 11, 2021
  1124ad2f
- [cmake] Add support for multiple distributions · 56f7e5a8
  Shoaib Meenai authored Oct 01, 2020
  56f7e5a8
- [X86] Fix -Wunused-lambda-capture · 0fe6649b
  Fangrui Song authored May 12, 2021
  
  0fe6649b
- [CMake][ELF] Add -fno-semantic-interposition and -Bsymbolic-functions · 3bf1acab
  Fangrui Song authored May 12, 2021
  3bf1acab
- [X86][AVX] Fold concat(ps*lq(x,32),ps*lq(y,32)) -> shuffle(concat(x,y),zero) (PR46621) · fb1d61b7
  Simon Pilgrim authored May 12, 2021
  fb1d61b7
- [AArch64][GlobalISel] Add MMOs to constant pool loads to allow LICM hoisting. · dc8d16c0
  Amara Emerson authored May 12, 2021
  dc8d16c0
- [SystemZ][z/OS] Fix warning caused by umask returning a signed integer type · cbed6e5b
  Abhina Sreeskantharajan authored May 12, 2021
  cbed6e5b
- [PowerPC] Fix definitions of CMPRB8, CMPEQB, CMPRB, SETB in PPCInstr64Bit.td and PPCInstrInfo.td · cf4610d2
  Victor Huang authored May 12, 2021
  
  cf4610d2
- [AMDGPU] Disable the SIFormMemoryClauses pass at -O1 · 5885f1a4
  Baptiste Saleil authored May 12, 2021
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- [X86][AVX] combineConcatVectorOps - add ConcatSubOperand helper. NFCI. · 7bff9bdd
  Simon Pilgrim authored May 12, 2021
  7bff9bdd
- [X86][AVX] Add v4i64 shift-by-32 tests · 778562ad
  Simon Pilgrim authored May 12, 2021
  778562ad
- [TargetLowering] Improve legalization of scalable vector types · c5ec00e6
  Fraser Cormack authored May 07, 2021
  c5ec00e6
- [llvm-cov][test] Add test coverage for "gcov" implying "llvm-cov gcov" compatibility. · 1336c5ae
  Jordan Rupprecht authored May 11, 2021
  1336c5ae
- [ValueTypes] Rename MVT::getVectorNumElements() to... · 44e0e91d
  Craig Topper authored May 12, 2021
  44e0e91d
- Revert "[SelectionDAG][Mips][PowerPC][RISCV][WebAssembly] Teach... · 8d37411e
  Stefan Pintilie authored May 12, 2021
  8d37411e
- [DAGCombiner] Fix DAG combine store elimination, different address space. · 762ac725
  Hendrik Greving authored May 11, 2021
  762ac725