Commits · fe0bf7d4694e3e265434fa0099b6b1cad16fa2a8 · Roger Ferrer / llvm-epi · GitLab

Feb 10, 2022
- [mlir][vector][NFC] Use CombiningKindAttr instead of StringAttr · fe0bf7d4
  Matthias Springer authored Feb 10, 2022
  fe0bf7d4
Feb 08, 2022
- [mlir][NFC] Remove a few op builders that simply swap parameter order · 3c69bc4d
  River Riddle authored Feb 06, 2022
  3c69bc4d
Feb 02, 2022
- [mlir] Split std.splat into tensor.splat and vector.splat · 6a8ba318
  River Riddle authored Jan 25, 2022
  6a8ba318
Jan 31, 2022
- [mlir][vector][NFC] Split into IR, Transforms and Utils · 99ef9eeb
  Matthias Springer authored Jan 31, 2022
  99ef9eeb
Jan 02, 2022
- Apply clang-tidy fixes for performance-for-range-copy to MLIR (NFC) · e4853be2
  Mehdi Amini authored Jan 02, 2022
  
  e4853be2
Dec 15, 2021
- [mlir][RFC] Add scalable dimensions to VectorType · a4830d14
  Javier Setoain authored Oct 12, 2021
  a4830d14
Dec 03, 2021
- [mlir][Vector] Support 0-D vectors in `BitCastOp` · 1423e8bf
  Michal Terepeta authored Dec 03, 2021
  1423e8bf
Dec 01, 2021
- Revert "[MLIR] Update Vector To LLVM conversion to be aware of assume_alignment" · 73863648
  Stephen Neuendorffer authored Nov 30, 2021
  73863648
Nov 25, 2021
- [mlir][Vector] Support 0-D vectors in `VectorPrintOpConversion` · cc311a15
  Michal Terepeta authored Nov 25, 2021
  cc311a15
Nov 23, 2021
- [mlir][Vector] Thread 0-d vectors through InsertElementOp. · 3ff4e5f2
  Nicolas Vasilache authored Nov 23, 2021
  3ff4e5f2
- [mlir][Vector] Thread 0-d vectors through ExtractElementOp. · e7026aba
  Nicolas Vasilache authored Nov 23, 2021
  e7026aba
Nov 15, 2021
- [mlir][Linalg] Add bounded recursion declaration to FMAOp -> LLVM conversion. · ee80ffbf
  Nicolas Vasilache authored Nov 15, 2021
  ee80ffbf
Oct 28, 2021
- [mlir][Linalg] NFC - Make more option names consistent. · cd392c0e
  Nicolas Vasilache authored Oct 27, 2021
  cd392c0e
Oct 27, 2021
- [mlir:DialectConversion] Restructure how argument/target materializations get invoked · 015192c6
  River Riddle authored Oct 27, 2021
  015192c6
Oct 25, 2021
- [mlir][Vector] NFC - Add option to hook vector.transpose lowering to strategies. · d054b80b
  Nicolas Vasilache authored Oct 25, 2021
  d054b80b
Oct 22, 2021
- [mlir][Vector] NFC - Extract rewrites related to insert/extract strided slice in a separate file. · eda2ebd7
  Nicolas Vasilache authored Oct 22, 2021
  eda2ebd7
Oct 19, 2021
- [mlir][RFC] Refactor layout representation in MemRefType · e41ebbec
  Vladislav Vinogradov authored Oct 11, 2021
  e41ebbec
Oct 13, 2021
- [MLIR] Replace std ops with arith dialect ops · a54f4eae
  Mogball authored Oct 12, 2021
  a54f4eae
Oct 07, 2021
- [mlir][vector] Split populateVectorContractLoweringPatterns · 3964c1db
  Lei Zhang authored Oct 07, 2021
  3964c1db
Oct 06, 2021
- [mlir][Linalg] Add support for min/max reduction vectorization in linalg.generic · eaf2588a
  Diego Caballero authored Oct 05, 2021
  eaf2588a
Sep 24, 2021
- [mlir:OpConversion] Remove the remaing usages of the deprecated matchAndRewrite methods · ef976337
  River Riddle authored Sep 24, 2021
  ef976337
Aug 31, 2021
- [Builder] Eliminate the StringRef/StringAttr forms of getSymbolRefAttr. · faf1c224
  Chris Lattner authored Aug 30, 2021
  faf1c224
Jul 22, 2021
- Add verifier for insert/extract element/value on type match between container... · 5a8a159b
  Mehdi Amini authored Jul 21, 2021
  5a8a159b
Jul 17, 2021
- [mlir][vector] Remove vector.transfer_read/write to LLVM lowering · d1a9e9a7
  Matthias Springer authored Jul 17, 2021
  d1a9e9a7
Jul 16, 2021
- [mlir] replace llvm.mlir.cast with unrealized_conversion_cast · 881dc34f
  Alex Zinenko authored Jul 13, 2021
  881dc34f
Jul 09, 2021
- [mlir] factor memref-to-llvm lowering out of std-to-llvm · 75e5f0aa
  Alex Zinenko authored Jul 08, 2021
  75e5f0aa
Jul 07, 2021
- [mlir][vector] Refactor Vector Unrolling and remove Tuple ops · 29102538
  thomasraoux authored Jul 02, 2021
  29102538
Jun 24, 2021
- [MLIR][LLVM] Expose type translator from LLVM to MLIR Type · 929189a4
  William S. Moses authored Jun 22, 2021
  929189a4
May 25, 2021
- [mlir] Check only last dim stride in transfer op lowering · 5017b0f8
  Matthias Springer authored May 25, 2021
  5017b0f8
May 19, 2021
- [MLIR] Update Vector To LLVM conversion to be aware of assume_alignment · 29a50c58
  Stephen Neuendorffer authored Apr 13, 2021
  29a50c58
May 18, 2021
- [mlir] Allow derived rewrite patterns to define a non-virtual `initialize` hook · 2257e4a7
  River Riddle authored May 18, 2021
  2257e4a7
May 13, 2021
- [mlir] Allow empty position in vector.insert and vector.extract · 864adf39
  Matthias Springer authored May 13, 2021
  864adf39
May 03, 2021
- [mlir][vector][NFC] split TransposeOp lowerning out of contractLowering · be8e2801
  thomasraoux authored May 03, 2021
  be8e2801
Apr 16, 2021
- [mlir][ArmSVE] Cleanup dialect registration · b739bada
  Javier Setoain authored Apr 16, 2021
  b739bada
Apr 12, 2021
- [mlir] Rename AVX512 dialect to X86Vector · 8508a63b
  Emilio Cota authored Apr 12, 2021
  8508a63b
Apr 08, 2021
- [mlir] add support for index type in vectors. · b614ada0
  Tobias Gysi authored Apr 08, 2021
  b614ada0
Apr 07, 2021
- [mlir] Add "mask" operand to vector.transfer_read/write. · 65a3f289
  Matthias Springer authored Apr 07, 2021
  65a3f289
Mar 31, 2021
- [mlir] Change vector.transfer_read/write "masked" attribute to "in_bounds". · 95f81350
  Matthias Springer authored Mar 31, 2021
  95f81350
Mar 23, 2021
- [PatternMatch] Big mechanical rename OwningRewritePatternList ->... · dc4e913b
  Chris Lattner authored Mar 22, 2021
  dc4e913b
Mar 21, 2021
- Change OwningRewritePatternList to carry an MLIRContext with it. · 3a506b31
  Chris Lattner authored Mar 20, 2021
  3a506b31