Commits · ff05e2b0e609a10ac7ab1db445ffdba24319d50d · Roger Ferrer / llvm-epi · GitLab

Mar 19, 2018
- [MachineLICM] Add functions to MachineLICM to hoist invariant stores · ff05e2b0
  Zaara Syeda authored Mar 19, 2018
  ff05e2b0
- [X86] Generalize schedule classes to support multiple stages · 30c38c38
  Simon Pilgrim authored Mar 19, 2018
  30c38c38
- run-clang-tidy: forward clang-tidy exit status · 10fe9bc7
  Miklos Vajna authored Mar 19, 2018
  10fe9bc7
- [x86] put nops into the WriteNop class and customize for Jaguar · 05daae75
  Sanjay Patel authored Mar 19, 2018
  05daae75
- Updated a usage of createTemporaryFile that does not expect file to be created. · 749788ea
  Ilya Biryukov authored Mar 19, 2018
  749788ea
- Changed createTemporaryFile without FD to actually create a file. · 84185763
  Ilya Biryukov authored Mar 19, 2018
  84185763
- TableGen: Explicitly forbid self-references to field members · 2ad19016
  Nicolai Haehnle authored Mar 19, 2018
  2ad19016
- TableGen: Check the dynamic type of !cast<Rec>(string) · 4186cc7c
  Nicolai Haehnle authored Mar 19, 2018
  4186cc7c
- TableGen: Explicitly test some cases of self-references and !cast errors · 18f1998a
  Nicolai Haehnle authored Mar 19, 2018
  18f1998a
- TableGen: Only fold when some operand made resolve progress · 335c70f5
  Nicolai Haehnle authored Mar 19, 2018
  335c70f5
- TableGen: Remove OpInit::Fold · a43af64f
  Nicolai Haehnle authored Mar 19, 2018
  a43af64f
- TableGen: Move GenStrConcat to a helper function in BinOpInit · 1eaebc62
  Nicolai Haehnle authored Mar 19, 2018
  1eaebc62
- TableGen: Remove the cast-from-string-to-variable-reference feature · c47fe129
  Nicolai Haehnle authored Mar 19, 2018
  c47fe129
- AMDGPU/GlobalISel: RegBankSelect for basic int ops · fed0a450
  Matt Arsenault authored Mar 19, 2018
  fed0a450
- AMDGPU: Don't leave dead illegal VGPR->SGPR copies · 69932e4d
  Matt Arsenault authored Mar 19, 2018
  69932e4d
- [NFC] Fix minor typos in comments · 1af12b58
  Karl-Johan Karlsson authored Mar 19, 2018
  1af12b58
- [MergeICmps] Re-land 324317 "Enable the MergeICmps Pass by default." · 6d047b70
  Clement Courbet authored Mar 19, 2018
  6d047b70
- [ARM] Support for v4f16 and v8f16 vectors · d16037d9
  Sjoerd Meijer authored Mar 19, 2018
  d16037d9
- Stylish change. NFC · 116c3091
  Xin Tong authored Mar 19, 2018
  116c3091
- [llvm-mca] Add pipeline stall events. · 91ab2ee9
  Andrea Di Biagio authored Mar 19, 2018
  91ab2ee9
- [ARM] Pass half or i16 types for NEON intrinsics · 87793e75
  Sjoerd Meijer authored Mar 19, 2018
  87793e75
- build_llvm_package.bat: Drop LLDB from the package. · f646bcc2
  Hans Wennborg authored Mar 19, 2018
  f646bcc2
- [SystemZ] Bugfix of CC liveness in emitMemMemWrapper (CLC). · a6216ec4
  Jonas Paulsson authored Mar 19, 2018
  a6216ec4
- [clang-tidy] New check bugprone-unused-return-value · fcefdb87
  Alexander Kornienko authored Mar 19, 2018
  fcefdb87
- HexagonISelLowering.cpp: fix 'enum in bool context' warning · 13e8a858
  Hans Wennborg authored Mar 19, 2018
  13e8a858
- [RISCV] Peephole optimisation for load/store of global values or constant addresses · 0171a9f4
  Alex Bradbury authored Mar 19, 2018
  0171a9f4
- [MSan] fix the types of RegSaveAreaPtrPtr and OverflowArgAreaPtrPtr · fa021727
  Alexander Potapenko authored Mar 19, 2018
  fa021727
- [MSan] Don't create zero offsets in getShadowPtrForArgument(). NFC · 014ff63f
  Alexander Potapenko authored Mar 19, 2018
  014ff63f
- [MSan] Introduce insertWarningFn(). NFC · e0bafb43
  Alexander Potapenko authored Mar 19, 2018
  e0bafb43
- [ARM] Fix warnings about missing parentheses in ARMAsmParser · f07278ec
  Mikhail Maltsev authored Mar 19, 2018
  f07278ec
- [SCEV] Factor out isKnownViaInduction. NFC. · 7d0664b4
  Serguei Katkov authored Mar 19, 2018
  7d0664b4
- [ELF] Recommit 327248 with Arm using the .got for _GLOBAL_OFFSET_TABLE_ · 3d044f57
  Peter Smith authored Mar 19, 2018
  3d044f57
- [SCEV] Re-land: Fix isKnownPredicate · 529f4233
  Serguei Katkov authored Mar 19, 2018
  529f4233
- [X86] Merge XADD8rr regular expression with XADD16rr/XADD32rr/XADD64rr in a... · e18fbab9
  Craig Topper authored Mar 19, 2018
  e18fbab9
- [X86] Add ADD16i16/ADD32i32/ADD64i32 and similar to the scheduler models to match ADD8i8. · d10ceffa
  Craig Topper authored Mar 19, 2018
  d10ceffa
- [X6] Remove two unused InstrItinClass · e9c99d32
  Craig Topper authored Mar 19, 2018
  e9c99d32
- remainder: Port from amd builtins · 5b10494f
  Jan Vesely authored Mar 19, 2018
  5b10494f
- [X86] Use IIC_CMOV64_RR/RM on 64-bit cmov instructions. · 793733a6
  Craig Topper authored Mar 19, 2018
  793733a6
- [X86] Merge 32 and 64-bit RORX/SHLX/SARX/SHRX into single regular expressions in scheduler models. · 9b60dcb2
  Craig Topper authored Mar 19, 2018
  9b60dcb2
- [X86] Merge 8-bit instructions into instregex with 16/32/64 instructions in... · 13a1650d
  Craig Topper authored Mar 19, 2018
  13a1650d