Commits · ffe64b1ee5a234b9599e2ad8525249a70a96e04c · Roger Ferrer / llvm-epi · GitLab

Jul 07, 2010
- Give FunctionLoweringInfo an MBB member, avoiding the need to pass it · ffe64b1e
  Dan Gohman authored Jul 07, 2010
  ffe64b1e
- Simplify FastISel's constructor by giving it a FunctionLoweringInfo · 87fb4e8f
  Dan Gohman authored Jul 07, 2010
  87fb4e8f
- Split the SDValue out of OutputArg so that SelectionDAG-independent · fe7532a3
  Dan Gohman authored Jul 07, 2010
  fe7532a3
- Add AVX SSE4.2 instructions · 6d122aef
  Bruno Cardoso Lopes authored Jul 07, 2010
  6d122aef
- Use only one multiclass to pinsrq instructions · 3df55b2d
  Bruno Cardoso Lopes authored Jul 07, 2010
  3df55b2d
- Now that almost all SSE4.1 AVX instructions are added, move code around to... · fd6c8081
  Bruno Cardoso Lopes authored Jul 07, 2010
  fd6c8081
- Add AVX SSE4.1 insertps, ptest and movntdqa instructions · 8f5472a8
  Bruno Cardoso Lopes authored Jul 07, 2010
  8f5472a8
- Add AVX SSE4.1 extractps and pinsr instructions · 6430c735
  Bruno Cardoso Lopes authored Jul 07, 2010
  6430c735
- Also use REG_SEQUENCE for VTBX instructions. · 5bc8a79e
  Bob Wilson authored Jul 07, 2010
  5bc8a79e
- Mark eh.sjlj.set/longjmp custom lowerings as Darwin-only since that's where · 31984838
  Jim Grosbach authored Jul 07, 2010
  31984838
- Add AVX SSE4.1 Extract Integer instructions · f3116ebe
  Bruno Cardoso Lopes authored Jul 07, 2010
  f3116ebe
- By default, the eh.sjlj.setjmp/longjmp intrinsics should just do nothing rather · dc0a0659
  Jim Grosbach authored Jul 06, 2010
  dc0a0659
- Use REG_SEQUENCE nodes to make the table registers for VTBL instructions be · 3ed511bc
  Bob Wilson authored Jul 06, 2010
  3ed511bc
- Accept RIP-relative symbols with 'i' constraint, and · ce656633
  Dale Johannesen authored Jul 06, 2010
  ce656633
- Track defs for all aliases in NEONMoveFix. · 48deb125
  Jakob Stoklund Olesen authored Jul 06, 2010
  48deb125
- Add the rest of AVX SSE4.1 packed move with sign/zero extend instructions · 1f9ad516
  Bruno Cardoso Lopes authored Jul 06, 2010
  1f9ad516
- Add part of AVX SSE4.1 packed move with sign/zero extend instructions · 35702d27
  Bruno Cardoso Lopes authored Jul 06, 2010
  35702d27
- Fix comment from previous patch · 13f0260e
  Bruno Cardoso Lopes authored Jul 06, 2010
  13f0260e
- Add AVX vblendvpd, vblendvps and vpblendvb instructions · e2bd058d
  Bruno Cardoso Lopes authored Jul 06, 2010
  e2bd058d
- CanLowerReturn doesn't need a SelectionDAG; it just needs an LLVMContext. · ee0cb703
  Dan Gohman authored Jul 06, 2010
  ee0cb703
- Propagate debug loc. · a3ca21b2
  Devang Patel authored Jul 06, 2010
  a3ca21b2
Jul 06, 2010
- Represent NEON load/store alignments in bytes, not bits. · 4c1ca290
  Bob Wilson authored Jul 06, 2010
  4c1ca290
- Reapply r107655 with fixes; insert the pseudo instruction into · 34396292
  Dan Gohman authored Jul 06, 2010
  34396292
- Fix PR7545 crash. · 23a75935
  Devang Patel authored Jul 06, 2010
  23a75935
- Don't create neon moves in CopyRegToReg. NEONMoveFixPass will do the conversion · 7c510aa7
  Rafael Espindola authored Jul 06, 2010
  7c510aa7
- Revert r107655. · f4f04107
  Dan Gohman authored Jul 06, 2010
  f4f04107
- Make getMinimalPhysRegClass' comment mention what makes it different · 2b2a1c3c
  Dan Gohman authored Jul 06, 2010
  2b2a1c3c
- Fix a bunch of custom-inserter functions to handle the case where · 12205645
  Dan Gohman authored Jul 06, 2010
  12205645
- Fix up -fstack-protector on linux to use the segment · 2ad0c779
  Eric Christopher authored Jul 06, 2010
  2ad0c779
Jul 05, 2010
- Have the X86 backend use Triple instead of a string and some enums. · d429846e
  Eric Christopher authored Jul 05, 2010
  d429846e
- Remove some unused/redundant code. · d5ac2871
  Kalle Raiskila authored Jul 05, 2010
  d5ac2871
- more tidying. · c4a7073d
  Chris Lattner authored Jul 05, 2010
  c4a7073d
- some notes about suboptimal insertps's · 7b909ac7
  Chris Lattner authored Jul 05, 2010
  7b909ac7
- rip out even more sporadic v2f32 support. · 6d60a142
  Chris Lattner authored Jul 05, 2010
  6d60a142
- rip out the various v2f32 "mmx" handling logic, now that · feb2467b
  Chris Lattner authored Jul 05, 2010
  feb2467b
- Just rip v2f32 support completely out of the X86 backend. In · 45cc4d74
  Chris Lattner authored Jul 04, 2010
  45cc4d74
- fix PR7518 - terrible codegen of <2 x float>, by only marking · 681b926d
  Chris Lattner authored Jul 04, 2010
  681b926d
- indentation · cb948d33
  Chris Lattner authored Jul 04, 2010
  cb948d33
Jul 04, 2010
- Revert r107583. I no longer think that this is the way to solve the problem. · 199cacf1
  Bill Wendling authored Jul 04, 2010
  199cacf1
- Mark sse_load_f32 and sse_load_f64 as having memory operands · 701aa053
  Bill Wendling authored Jul 04, 2010
  701aa053