Commits · 10d6f9ac0403710fefaee324bfccd2a01e41a6c3 · Raul Torres / llvm-target-spread · GitLab

Mar 09, 2016
- [AMDGPU] Assembler: Support abs() syntax. · 9b7577ed
  Nikolay Haustov authored Mar 09, 2016
  9b7577ed
- [AMDGPU] Assembler: Fix s_setpc_b64 · 8e3f0994
  Nikolay Haustov authored Mar 09, 2016
  8e3f0994
- [WebAssembly] Update comments about irreducible control flow. · ddfa1a6c
  Dan Gohman authored Mar 09, 2016
  ddfa1a6c
- [WebAssembly] Implement irreducible control flow. · d7a2eea6
  Dan Gohman authored Mar 09, 2016
  d7a2eea6
Mar 08, 2016
- Revert r262759 and r262760. · 4340b555
  Quentin Colombet authored Mar 08, 2016
  4340b555
- [AArch64] Add MMOs to unscaled pairs. · e40b9513
  Chad Rosier authored Mar 08, 2016
  e40b9513
- [ARM] Simplify ARMInstr*.td by getting rid of identity PatFrags (NFC) · 5ddea6a8
  Artyom Skrobov authored Mar 08, 2016
  5ddea6a8
- Revert r262599 "[X86][SSE] Improve vector ZERO_EXTEND by combining to ZERO_EXTEND_VECTOR_INREG" · e00b6e72
  Hans Wennborg authored Mar 08, 2016
  e00b6e72
- AVX512: Add extract_subvector patterns v8i1->v4i1 , v4i1->v2i1. · 999ac754
  Igor Breger authored Mar 08, 2016
  999ac754
- [Power9] Implement new vsx instructions: load, store instructions for vector and scalar · ba532dc8
  Kit Barton authored Mar 08, 2016
  ba532dc8
- [WebAssembly] Update for spec change from tableswitch to br_table. · 14026064
  Dan Gohman authored Mar 08, 2016
  14026064
- [AArch64] Initialize GlobalISel as part of the target initialization. · f574ab29
  Quentin Colombet authored Mar 08, 2016
  f574ab29
- A couple more UB fixes for C++14 sized deallocation. · c2a2830e
  Richard Smith authored Mar 08, 2016
  c2a2830e
Mar 07, 2016
- AMDGPU: Match more med3 integer patterns · c89f2919
  Matt Arsenault authored Mar 07, 2016
  c89f2919
- AMDGPU: Remove a fixme for ptrrtoint handling · 56356c8a
  Matt Arsenault authored Mar 07, 2016
  56356c8a
- AMDGPU: Move function only used by R600 · 81d06015
  Matt Arsenault authored Mar 07, 2016
  81d06015
- [ms-inline-asm][AVX512] Add ability to use k registers in MS inline asm + fix bag with curly braces · 5f5de9f8
  Marina Yatsina authored Mar 07, 2016
  5f5de9f8
Mar 06, 2016
- [X86][AVX512] Fixed VPERMT2* shuffle mask decoding and enabled target shuffle combining. · 253ca348
  Simon Pilgrim authored Mar 06, 2016
  253ca348
- [AMDGPU] Using table-driven amd_kernel_code_t field parser in assembler. · dc11054f
  Valery Pykhtin authored Mar 06, 2016
  dc11054f
- fix sanitizer-ppc64be-linux failure for r262804 · 50cd3c4e
  Valery Pykhtin authored Mar 06, 2016
  50cd3c4e
- [AMDGPU] table-driven parser/printer for amd_kernel_code_t structure fields · 499a5c63
  Valery Pykhtin authored Mar 06, 2016
  499a5c63
- AVX512BW: Support llvm intrinsic masked vector load/store for i8/i16 element types on SKX · 4d94d4d5
  Igor Breger authored Mar 06, 2016
  4d94d4d5
- [AMDGPU] SOPxx instructions operand naming fixed in td files. · 0c6293da
  Valery Pykhtin authored Mar 06, 2016
  0c6293da
- [X86] Use high bits of return value from getEncoding instead of predicate... · 581c0087
  Craig Topper authored Mar 06, 2016
  581c0087
- [X86] Remove unnecessary masking. The assert above it already guaranteed it. NFC · faab5c68
  Craig Topper authored Mar 06, 2016
  faab5c68
- [X86] Use uint8_t instead of unsigned char as it shortens the code and more... · 5e038cf5
  Craig Topper authored Mar 06, 2016
  5e038cf5
- AVX512: Remove VSHRI kmask patterns from TD file. It is incorrect to use... · f1bd761e
  Igor Breger authored Mar 06, 2016
  f1bd761e
Mar 05, 2016
- [X86][AVX] Improved VPERMILPS variable shuffle mask decoding. · 40e1a71c
  Simon Pilgrim authored Mar 05, 2016
  40e1a71c
- [X86] AMD Bobcat CPU (btver1) doesn't support XSAVE · aa99331b
  Simon Pilgrim authored Mar 05, 2016
  aa99331b
- [X86] Fix the lowering of setjmp intrinsic on i386. · 2a7676b4
  Quentin Colombet authored Mar 05, 2016
  2a7676b4
- [X86] Do not use cmpxchgXXb when we need the base pointer (RBX). · 13b52459
  Quentin Colombet authored Mar 04, 2016
  13b52459
- Fix build breakage · 71a1c2c6
  David Majnemer authored Mar 04, 2016
  71a1c2c6
Mar 04, 2016
- [X86] Support cleaning more than 2**16 bytes of stack · d2f767d2
  David Majnemer authored Mar 04, 2016
  d2f767d2
- [WebAssembly] Add another possible code-size optimization to README.txt · e6b81362
  Dan Gohman authored Mar 04, 2016
  e6b81362
- [ARM] Merging 64-bit divmod lib calls into one · 175c6d6d
  Renato Golin authored Mar 04, 2016
  175c6d6d
- AMDGPU/SI: Add support for spiling SGPRs to scratch buffer · 649b5db5
  Tom Stellard authored Mar 04, 2016
  649b5db5
- AMDGPU/SI: Enable frame index scavenging during PrologEpilogueInserter · ebef6f97
  Tom Stellard authored Mar 04, 2016
  ebef6f97
- [Hexagon] Fix lowering of calls with the return type of i1 · 51155fc0
  Krzysztof Parzyszek authored Mar 04, 2016
  51155fc0
- [mips][microMIPS] Prevent usage of OR16_MMR6 instruction when code for microMIPS is generated. · a68b67d1
  Zoran Jovanovic authored Mar 04, 2016
  a68b67d1
- Test commit access · f51f4b83
  Sam Kolton authored Mar 04, 2016
  f51f4b83