Commits · 163af2ed7ad1b55c8bc8ac61a972fd8cb43bc110 · Raul Torres / llvm-target-spread · GitLab

Jul 16, 2017
- AMDGPU: Remove duplicate print outs from .AMDGPU.csdata · 163af2ed
  Konstantin Zhuravlyov authored Jul 16, 2017
  163af2ed
- Strip trailing whitespace. NFCI · 64fff14b
  Simon Pilgrim authored Jul 16, 2017
  64fff14b
- [X86] X86::CMOV to Branch heuristic based optimization. · 4563c062
  Amjad Aboud authored Jul 16, 2017
  4563c062
- [X86][SSE4A] Add EXTRQ/INSERTQ values to BTVER2 scheduling model · 73ef8797
  Simon Pilgrim authored Jul 16, 2017
  73ef8797
- fix typos in comments; NFC · 7f46baff
  Hiroshi Inoue authored Jul 16, 2017
  7f46baff
- fix typos in comments; NFC · a9ee279e
  Hiroshi Inoue authored Jul 16, 2017
  a9ee279e
Jul 15, 2017
- [mips] Handle the `long-calls` feature flags in the MIPS backend · f217c7b7
  Simon Atanasyan authored Jul 15, 2017
  f217c7b7
- SystemZCodeGen: Update libdeps. r308024 introduced LoopDataPrefetchPass. · 19a65238
  NAKAMURA Takumi authored Jul 15, 2017
  19a65238
- bpf: fix a compilation bug due to unused variable for release build · fbfae984
  Yonghong Song authored Jul 15, 2017
  fbfae984
- AMDGPU: Return correct type during argument lowering · b3463555
  Matt Arsenault authored Jul 15, 2017
  b3463555
- bpf: generate better lowering code for certain select/setcc instructions · 9276ef05
  Yonghong Song authored Jul 15, 2017
  9276ef05
Jul 14, 2017
- [AArch64] Avoid selecting XZR inline ASM memory operand · 3b680d8d
  Yi Kong authored Jul 14, 2017
  3b680d8d
- [AArch64][Falkor] Avoid HW prefetcher tag collisions (step 1) · b1e8714a
  Geoff Berry authored Jul 14, 2017
  b1e8714a
- [AMDGPU] Throw away more dead code. NFCI. · 6fdfede1
  Davide Italiano authored Jul 14, 2017
  6fdfede1
- [Hexagon] Replace ISD opcode VPACK with VPACKE/VPACKO, NFC · 302a9d41
  Krzysztof Parzyszek authored Jul 14, 2017
  302a9d41
- [AMDGPU] Garbage collect dead code. NFCI. · 502ac724
  Davide Italiano authored Jul 14, 2017
  502ac724
- [AMDGPU] Do not insert an instruction into worklist twice in movetovalu · 5b27072f
  Alfred Huang authored Jul 14, 2017
  5b27072f
- [Hexagon] Add intrinsics for data cache operations · 9c084fc5
  Krzysztof Parzyszek authored Jul 14, 2017
  9c084fc5
- Revert "Reland "[mips][mt][6/7] Add support for mftr, mttr instructions."" · 45b2277a
  Simon Dardis authored Jul 14, 2017
  45b2277a
- [SystemZ] Minor fixing in SystemZScheduleZ196.td · b144af49
  Jonas Paulsson authored Jul 14, 2017
  b144af49
- [SystemZ] Enable LoopDataPrefetch pass. · 89ca10de
  Jonas Paulsson authored Jul 14, 2017
  89ca10de
- Reland "[mips][mt][6/7] Add support for mftr, mttr instructions."" · b3529841
  Simon Dardis authored Jul 14, 2017
  b3529841
- Reverting commit 308011. · 0e039351
  Zoran Jovanovic authored Jul 14, 2017
  0e039351
- [mips][microMIPS] Extending size reduction pass with ADDIUSP and ADDIUR1SP · d374c599
  Zoran Jovanovic authored Jul 14, 2017
  d374c599
- [ARM] GlobalISel: Support G_BRCOND · 87a70679
  Diana Picus authored Jul 14, 2017
  87a70679
- [SystemZ] Minor fixing in SystemZScheduleZEC12.td · a84f9f53
  Jonas Paulsson authored Jul 14, 2017
  a84f9f53
- [ARM] Allow rematerialization of ARM Thumb literal pool loads · 28934485
  Sam Parker authored Jul 14, 2017
  28934485
- Add a set of comments explaining why getSubtargetImpl() is deleted on these targets. · 4e332c7c
  Eric Christopher authored Jul 14, 2017
  4e332c7c
- AMDGPU: Detect kernarg segment pointer · 23e4df6a
  Matt Arsenault authored Jul 14, 2017
  23e4df6a
- [AMDGPU] fcaninicalize optimization for GFX9+ · dc2890a8
  Stanislav Mekhanoshin authored Jul 13, 2017
  dc2890a8
Jul 13, 2017
- AMDGPU: Annotate call graph with used features · 6b93046f
  Matt Arsenault authored Jul 13, 2017
  6b93046f
- [NFC] Move DEBUG_TYPE below includes in Hexagon · 34327d28
  Jakub Kuderski authored Jul 13, 2017
  34327d28
- Revert "[mips][mt][6/7] Add support for mftr, mttr instructions." · 1558ee33
  Simon Dardis authored Jul 13, 2017
  1558ee33
- [Hexagon] Use VSPLAT instead of COMBINE for vectors of type v2i32, NFC · 89b2d7c9
  Krzysztof Parzyszek authored Jul 13, 2017
  89b2d7c9
- [PowerPC] Ensure displacements for DQ-Form instructions are multiples of 16 · 3c7e276d
  Nemanja Ivanovic authored Jul 13, 2017
  3c7e276d
- [AArch64] Implement support for windows style vararg functions · 68266faa
  Martin Storsjö authored Jul 13, 2017
  68266faa
- [AArch64] Enable the mnemonic spell checker · fe3ff69f
  Sjoerd Meijer authored Jul 13, 2017
  fe3ff69f
- [AArch64] Add an SVE target feature to the backend and TargetParser. · 9f3a245e
  Amara Emerson authored Jul 13, 2017
  9f3a245e
- [AArch64] Add preliminary support for ARMv8.1 SUB/AND atomics · 06e6a6bd
  Matthew Simpson authored Jul 13, 2017
  06e6a6bd
- Reland "[mips] Fix multiprecision arithmetic." · 250256f9
  Simon Dardis authored Jul 13, 2017
  250256f9