Commits · 275a4f76c4b9f15cc0f73c38b8f9ee12e0e477d5 · Raul Torres / llvm-target-spread · GitLab

Nov 02, 2017
- AMDGPU: Fix warning discovered by r317266 [-Wunused-private-field] · 275a4f76
  Konstantin Zhuravlyov authored Nov 02, 2017
  275a4f76
- Irreducible loop metadata for more accurate block frequency under PGO. · dce9def3
  Hiroshi Yamauchi authored Nov 02, 2017
  dce9def3
- [Hexagon] Prefer L2_loadrub_io over L4_loadrub_rr · 058014fc
  Krzysztof Parzyszek authored Nov 02, 2017
  058014fc
- [LoopPredication] Enable predication when latchCheckIV is wider than rangeCheck · 1d02b13e
  Anna Thomas authored Nov 02, 2017
  1d02b13e
- AMDGPU: Remove outdated fixme (it was already fixed) · b695cd41
  Konstantin Zhuravlyov authored Nov 02, 2017
  b695cd41
- [X86] Simplify the pentium4 code in getHostCPUName to be based on feature... · 1494915a
  Craig Topper authored Nov 02, 2017
  1494915a
- [X86] Change getHostCPUName fallback code to not select 'x86-64' for unknown... · a233e16c
  Craig Topper authored Nov 02, 2017
  a233e16c
- Strip off invariant.start because memory locations arent invariant · 729dafc1
  Anna Thomas authored Nov 02, 2017
  729dafc1
- Revert "[RS4GC] Strip off invariant.start because memory locations arent invariant" · ebe429d9
  Anna Thomas authored Nov 02, 2017
  ebe429d9
- [RS4GC] Strip off invariant.start because memory locations arent invariant · 486a7aaa
  Anna Thomas authored Nov 02, 2017
  486a7aaa
- Revert "[ExpandMemCmp] Split ExpandMemCmp from CodeGen into its own pass." · 82bade61
  Clement Courbet authored Nov 02, 2017
  82bade61
- [ExpandMemCmp] Split ExpandMemCmp from CodeGen into its own pass. · 1dc37b9c
  Clement Courbet authored Nov 02, 2017
  1dc37b9c
- [X86] Fix bug in legalize vector types - Split large loads · a37d1130
  Ayman Musa authored Nov 02, 2017
  a37d1130
- [mips] Use register scavenging with MSA. · 725acb2d
  Simon Dardis authored Nov 02, 2017
  725acb2d
- Temporary workaround for msan false positive. · 0e142499
  Sam McCall authored Nov 02, 2017
  0e142499
- Allow inaccessiblememonly and inaccessiblemem_or_argmemonly to be overwriten... · 6fefc0d6
  Yichao Yu authored Nov 02, 2017
  6fefc0d6
- [AsmPrinterDwarf] Add support for .cfi_restore directive · 66d2c269
  Francis Visoiu Mistrih authored Nov 02, 2017
  66d2c269
- [SimplifyCFG] Discard speculated dbg intrinsics · e73b85d1
  Bjorn Pettersson authored Nov 02, 2017
  e73b85d1
- [ARM] and, or, xor and add with shl combine · 242052c6
  Sam Parker authored Nov 02, 2017
  242052c6
- The patch updates sched numbers for YMM AVX instrs such as VMOVx, VORx, VXOR,... · 3c8bf5ec
  Andrew V. Tischenko authored Nov 02, 2017
  3c8bf5ec
- [X86] Remove the model checks from the 486 detection code in Host.cpp · 3bbe24c3
  Craig Topper authored Nov 02, 2017
  3bbe24c3
- [X86] Simplify the detection of pentium-mmx in Host.cpp. · 094d7914
  Craig Topper authored Nov 02, 2017
  094d7914
- [yaml2obj][ELF] Add support for setting alignment in program headers · 03aeeb09
  Jake Ehrlich authored Nov 01, 2017
  03aeeb09
- loop-unroll: teach remapInstruction to update dbg.value intrinsics. · bfa77c4c
  Adrian Prantl authored Nov 01, 2017
  bfa77c4c
- Revert "Correct dwarf unwind information in function epilogue for X86" · bb5c84fb
  Petar Jovanovic authored Nov 01, 2017
  bb5c84fb
Nov 01, 2017
- [LLVM-C] Expose functions to create debug locations via DIBuilder. · 789164d4
  whitequark authored Nov 01, 2017
  789164d4
- [X86] Use foreach in X86.td to combine some of the CPU names that are obviously aliases. NFC · 3837322a
  Craig Topper authored Nov 01, 2017
  3837322a
- [X86] Add CMOV feature to 'i686' processor, making it a proper alias of... · 7a754c46
  Craig Topper authored Nov 01, 2017
  7a754c46
- [globalisel][regbank] Warn about MIR ambiguities when register bank/class names clash. · 466fe399
  Daniel Sanders authored Nov 01, 2017
  466fe399
- [X86][SSE] Add PACKUS support to LowerTruncate · e152c2c4
  Simon Pilgrim authored Nov 01, 2017
  e152c2c4
- Rewrite FileOutputBuffer as two separate classes. · a16fe65b
  Rui Ueyama authored Nov 01, 2017
  a16fe65b
- [X86] Add custom code to EVEX to VEX pass to turn unmasked 128-bit VPALIGND/Q... · 4e56ba27
  Craig Topper authored Nov 01, 2017
  4e56ba27
- loop-rotate: avoid duplicating dbg.value intrinsics in the entry block. · 98c6549e
  Adrian Prantl authored Nov 01, 2017
  98c6549e
- loop-rotate: eliminate duplicate debug intrinsics after splicing. · d60f34c2
  Adrian Prantl authored Nov 01, 2017
  d60f34c2
- Include GUIDs from the same module when computing GUIDs that needs to be imported. · c6c051f2
  Dehao Chen authored Nov 01, 2017
  c6c051f2
- Revert 317016 and 317048 · 7b861f08
  Philip Reames authored Nov 01, 2017
  7b861f08
- AMDGPU: Fix set but not used warnings related to AMDGPUAS · 435151ad
  Konstantin Zhuravlyov authored Nov 01, 2017
  435151ad
- [X86] Prevent fast isel from folding loads into the instructions listed in hasPartialRegUpdate. · ca1aa83c
  Craig Topper authored Nov 01, 2017
  ca1aa83c
- Adds code to PPC ISEL lowering to recognize half-word inserts from... · 67152614
  Graham Yiu authored Nov 01, 2017
  67152614
- Revert r317105 to investigate bot breakage. · c8516346
  Adrian Prantl authored Nov 01, 2017
  c8516346