Commits · 414d00139b4bd1852f62a600a3e6d4892eb5f81a · Raul Torres / llvm-target-spread · GitLab

Aug 05, 2017
- [ARM] Add registers to debuginfo MIR test cases. · 414d0013
  Florian Hahn authored Aug 05, 2017
  414d0013
- IPRA: Don't crash on null getCallPreservedMask · b94972cb
  Matt Arsenault authored Aug 05, 2017
  b94972cb
- [AArch64] LSE Atomics reorg - part 1 · 60711ca2
  Joel Jones authored Aug 05, 2017
  60711ca2
- [InstCombine] In foldSelectICmpAnd, if we need to to truncate from the 'and'... · fc528309
  Craig Topper authored Aug 05, 2017
  fc528309
- Commit the local change I had to make my test pass · 61776e69
  Reid Kleckner authored Aug 05, 2017
  61776e69
- [X86] Teach fastisel to select calls to dllimport functions · 7662d50d
  Reid Kleckner authored Aug 05, 2017
  7662d50d
- [X86] Regenerate the fsin/fcos instruction test using update_llc_test_checks.py. NFC · 4a8a0a2a
  Craig Topper authored Aug 04, 2017
  4a8a0a2a
- [llvm][llvm-objcopy] When outputting to binary don't output segments that cover no sections · d53951d2
  Petr Hosek authored Aug 04, 2017
  d53951d2
- Enable llvm-pdbutil to list enumerations using native PDB reader · b41f03e7
  Adrian McCarthy authored Aug 04, 2017
  b41f03e7
- [InstCombine] narrow truncated add/sub/mul with constant · e12d734b
  Sanjay Patel authored Aug 04, 2017
  e12d734b
Aug 04, 2017
- Fix broken PDB tests. · dd6f4368
  Zachary Turner authored Aug 04, 2017
  dd6f4368
- Reland "[llvm][llvm-objcopy] Added support for outputting to binary in llvm-objcopy" · c4df10e1
  Petr Hosek authored Aug 04, 2017
  c4df10e1
- Revert r310055, it caused PR34074. · 69ca5322
  Nico Weber authored Aug 04, 2017
  69ca5322
- [InstCombine] add vector tests for truncated math; NFC · 73ab438c
  Sanjay Patel authored Aug 04, 2017
  73ab438c
- Revert r310058, it caused PR34073. · b24df62b
  Nico Weber authored Aug 04, 2017
  b24df62b
- [SCEV] Preserve NSW information for sext(subtract). · 56dca4e3
  Amara Emerson authored Aug 04, 2017
  56dca4e3
- [llvm-pdbutil] Dump image section headers. · fb1cd509
  Zachary Turner authored Aug 04, 2017
  fb1cd509
- [InstCombine] auto-generate test checks; NFC · 029fc771
  Sanjay Patel authored Aug 04, 2017
  029fc771
- [SystemZ] Add support for 128-bit atomic load/store/cmpxchg · a11f63a9
  Ulrich Weigand authored Aug 04, 2017
  a11f63a9
- [SystemZ] Eliminate unnecessary serialization operations · 02f1c02c
  Ulrich Weigand authored Aug 04, 2017
  02f1c02c
- Fix PR33514 · 38197c66
  Evgeny Stupachenko authored Aug 04, 2017
  38197c66
- [AMDGPU] Implement llvm.amdgcn.set.inactive intrinsic · 66b9bd6e
  Connor Abbott authored Aug 04, 2017
  66b9bd6e
- [AMDGPU] Add support for Whole Wavefront Mode · 92638ab6
  Connor Abbott authored Aug 04, 2017
  92638ab6
- [AMDGPU] Add an llvm.amdgcn.wqm intrinsic for WQM · 8c217d0a
  Connor Abbott authored Aug 04, 2017
  8c217d0a
- [ArgPromotion] Preserve alignment of byval argument in new alloca · da748f1c
  Reid Kleckner authored Aug 04, 2017
  da748f1c
- [AArch64] Fix an assertion for pre-index generation with unscaled loads/stores. · 14fc82a1
  Chad Rosier authored Aug 04, 2017
  14fc82a1
- [InstCombine] Remove the (not (sext)) case from foldBoolSextMaskToSelect and... · 760ff6ee
  Craig Topper authored Aug 04, 2017
  760ff6ee
- [ThinLTO] Add FunctionAttrs to ThinLTO index · 75da10d1
  Charles Saternos authored Aug 04, 2017
  75da10d1
- [InstCombine] narrow lshr with constant · 79e7f6b3
  Sanjay Patel authored Aug 04, 2017
  79e7f6b3
- [AMDGPU][MC] Enabled expressions as operands · 4b11a78a
  Dmitry Preobrazhensky authored Aug 04, 2017
  4b11a78a
- [DAGCombiner] Extending pattern detection for vector shuffle. · 5c635864
  Simon Pilgrim authored Aug 04, 2017
  5c635864
- [DSE] Merge stores when the later store only writes to memory locations the... · fb9d2a87
  Filipe Cabecinhas authored Aug 04, 2017
  fb9d2a87
- [InstCombine] Canonicalize clamp of float types to minmax in fast mode. · 1545eb34
  Nikolai Bozhenov authored Aug 04, 2017
  1545eb34
- Add some tests for cast+clamp/min/max before D33186. · bdd32609
  Nikolai Bozhenov authored Aug 04, 2017
  bdd32609
- [mips][microMIPS] Extending size reduction pass with ADDIUSP and ADDIUR1SP · 1c170012
  Zoran Jovanovic authored Aug 04, 2017
  1c170012
- [IRCE] Handle loops with step different from 1/-1 · 2f6ae281
  Max Kazantsev authored Aug 04, 2017
  2f6ae281
- [AMDGPU] Preserve inverted bit in SI_IF in presence of SI_KILL · 6c7a8d0b
  Stanislav Mekhanoshin authored Aug 04, 2017
  6c7a8d0b
- [IRCE] Recognize loops with unsigned latch conditions · 07da1ab2
  Max Kazantsev authored Aug 04, 2017
  07da1ab2
- Revert "[llvm][llvm-objcopy] Added support for outputting to binary in llvm-objcopy" · b1bb3e54
  Petr Hosek authored Aug 04, 2017
  b1bb3e54
- Un-revert r310014: false revert, it wasn't the cause of build break · 56b03d0d
  Victor Leschuk authored Aug 04, 2017
  56b03d0d