Commits · 47f856095a0180c01a07e5c72769a4163efd9d98 · Raul Torres / llvm-target-spread · GitLab

Jun 21, 2017
- [BasicAA] Use MayAlias instead of PartialAlias for fallback. · 47f85609
  Michael Kruse authored Jun 21, 2017
  47f85609
- Object: Have the irsymtab builder take a string table builder. NFCI. · afaeed53
  Peter Collingbourne authored Jun 21, 2017
  afaeed53
- [CGP, memcmp] replace CreateZextOrTrunc with CreateZext because it can never trunc · 2a6f9f8a
  Sanjay Patel authored Jun 21, 2017
  2a6f9f8a
- [CGP] fix variables to be unsigned in memcmp expansion · a10f5b62
  Sanjay Patel authored Jun 21, 2017
  a10f5b62
- Do not inline recursive direct calls in sample loader pass. · 50f2aa19
  Dehao Chen authored Jun 21, 2017
  50f2aa19
- [PDB] Add symbols to the PDB · d0e6e24a
  Reid Kleckner authored Jun 21, 2017
  d0e6e24a
- [PowerPC] define target hook isReallyTriviallyReMaterializable() · 84dbbfde
  Lei Huang authored Jun 21, 2017
  84dbbfde
- [x86] set the datalayout to match the RUN line triple; NFC · deed5791
  Sanjay Patel authored Jun 21, 2017
  deed5791
- [InstCombine] Add range metadata to cttz/ctlz/ctpop intrinsic calls based on known bits · 5b173f2b
  Craig Topper authored Jun 21, 2017
  5b173f2b
- [InstCombine] Don't let folding (select (icmp eq (and X, C1), 0), Y, (or Y,... · ae86cc72
  Craig Topper authored Jun 21, 2017
  ae86cc72
- [Reassociate] Support xor reassociating for splat vectors · cbac691c
  Craig Topper authored Jun 21, 2017
  cbac691c
- [AMDGPU][MC][GFX9] Corrected VOP3P relevant code to fix disassembler failures · 851a3d9f
  Dmitry Preobrazhensky authored Jun 21, 2017
  851a3d9f
- [DAG] Move BaseIndexOffset into separate Libarary. NFC. · c1b6aa77
  Nirav Dave authored Jun 21, 2017
  c1b6aa77
- ClangFormat some changes from r305226 · 8f9621ae
  David Blaikie authored Jun 21, 2017
  8f9621ae
- [AARCH64][LSE] Preliminary support for ARMv8.1 LSE Atomics. · 1ee68828
  Christof Douma authored Jun 21, 2017
  1ee68828
- [DAG] Remove Node csonstruction from BaseIndexOffset match. NFCI. · 9a69d444
  Nirav Dave authored Jun 21, 2017
  9a69d444
- [X86][SSE] Dropped -mcpu from 256-bit vector shuffle tests · 550cb7e8
  Simon Pilgrim authored Jun 21, 2017
  550cb7e8
- [AMDGPU][MC] Corrected V_*QSAD* instructions to check that dest register is... · dc4ac823
  Dmitry Preobrazhensky authored Jun 21, 2017
  dc4ac823
- [x86] fix formatting; NFC · cec6a500
  Sanjay Patel authored Jun 21, 2017
  cec6a500
- [X86][SSE] Dropped -mcpu from 128-bit vector shuffle tests · 9d0c2b7b
  Simon Pilgrim authored Jun 21, 2017
  9d0c2b7b
- [X86][SSE] Regenerate merge store tests · 5309b7d5
  Simon Pilgrim authored Jun 21, 2017
  5309b7d5
- [X86][SSE] Dropped -mcpu from vector blend shuffle tests and regenerate · e74e08fe
  Simon Pilgrim authored Jun 21, 2017
  e74e08fe
- [X86][SSE] Dropped -mcpu from vector shuffle tests · 98aab7c6
  Simon Pilgrim authored Jun 21, 2017
  98aab7c6
- [X86][SSE] Dropped -mcpu from vector zero extend tests · 6d5d6b54
  Simon Pilgrim authored Jun 21, 2017
  6d5d6b54
- [X86][SSE] Dropped -mcpu from variable shuffle tests · c388ec32
  Simon Pilgrim authored Jun 21, 2017
  c388ec32
- [X86][AVX] Add AVX1 shuffle truncation tests · 73814a25
  Simon Pilgrim authored Jun 21, 2017
  73814a25
- [X86][SSE] Add SSE2/SSE42 shuffle truncation tests · db6c3fa8
  Simon Pilgrim authored Jun 21, 2017
  db6c3fa8
- [X86] Rerun the update_llc_test_checks tool on test. NFC. · 845ca8fb
  Zvi Rackover authored Jun 21, 2017
  845ca8fb
- Fix build after r305892 · 2c1e8b7a
  Pavel Labath authored Jun 21, 2017
  2c1e8b7a
- [AARCH64][LSE] Preliminary support for ARMv8.1 LSE Atomics. · c1c28051
  Christof Douma authored Jun 21, 2017
  c1c28051
- [Support] Add RetryAfterSignal helper function · 1f6aea2e
  Pavel Labath authored Jun 21, 2017
  1f6aea2e
- [AArch64] Add early exit to promoteLoadFromStore. · 8552e591
  Florian Hahn authored Jun 21, 2017
  8552e591
- [MIPS] Fix for selecting of DINS/INS instruction · d280ea4f
  Strahinja Petrovic authored Jun 21, 2017
  d280ea4f
- Use range-loop in machine-scheduler. NFCI. · e3a0cc2c
  Javed Absar authored Jun 21, 2017
  e3a0cc2c
- [AMDGPU] SDWA: merge VI and GFX9 pseudo instructions · 549c89d2
  Sam Kolton authored Jun 21, 2017
  549c89d2
- [AArch64] Preserve register flags when promoting a load from store. · 80e48517
  Florian Hahn authored Jun 21, 2017
  80e48517
- [DAGCombiner] Add another combine from build vector to shuffle · 52d73fce
  Guy Blank authored Jun 21, 2017
  52d73fce
- [SCEV] Make MulOpsInlineThreshold lower to avoid excessive compilation time · eac01d4c
  Max Kazantsev authored Jun 21, 2017
  eac01d4c
- Simplify test. · 2c8e3ed0
  Rafael Espindola authored Jun 21, 2017
  2c8e3ed0
- [XRay] Reduce synthetic references emitted by XRay · 28ecff5c
  Dean Michael Berris authored Jun 21, 2017
  28ecff5c