Commits · 53e423ed1ee1896a0bb7641d6e73a06d67a2a481 · Raul Torres / llvm-target-spread · GitLab

Apr 13, 2018
- [InstCombine][NFC] Add last few tests with constant mask for masked merge folding. · 53e423ed
  Roman Lebedev authored Apr 13, 2018
  53e423ed
- [NFC] fix trivial typos in comments · 372ffa15
  Hiroshi Inoue authored Apr 13, 2018
  372ffa15
- [InstCombine][NFC] Add tests for masked merge folding. · 038d996c
  Roman Lebedev authored Apr 13, 2018
  038d996c
- [InstCombine]: foldSelectICmpAndAnd(): and is commutative · c0065932
  Roman Lebedev authored Apr 13, 2018
  c0065932
- [X86] Introduce cldemote instruction · 604be442
  Gabor Buella authored Apr 13, 2018
  604be442
- [X86] Remove the pmuldq/pmuldq intrinsics and replace with native IR. · 254ed028
  Craig Topper authored Apr 13, 2018
  254ed028
- Enable debug fission for thinLTO linked via gold-plugin · bd200b9f
  Yunlian Jiang authored Apr 13, 2018
  bd200b9f
- [PowerPC] add fsub-fneg test; NFC · 9adb386a
  Sanjay Patel authored Apr 12, 2018
  9adb386a
Apr 12, 2018
- Let llvm-diff correctly deal with Undef/ConstantAggregateZero/ConstantVector/IndirectBr · d0d2ce94
  Brian Gesiak authored Apr 12, 2018
  d0d2ce94
- AArch64: Introduce a DAG combine for folding offsets into addresses. · 00db326b
  Peter Collingbourne authored Apr 12, 2018
  00db326b
- [DebugInfo] Create merged locations for instructions other than calls · 65b0d4df
  Vedant Kumar authored Apr 12, 2018
  65b0d4df
- [WebAssembly] libObject: Don't include the name the size of custom sections · 9745afa6
  Sam Clegg authored Apr 12, 2018
  9745afa6
- [RISCV] Add c.mv rs1, rs2 pattern for addi rs1, rs2, 0 · e8b7ff30
  Sameer AbuAsal authored Apr 12, 2018
  e8b7ff30
- [X86] Introduce LLVM wbinvd intrinsic · 297c1387
  Gabor Buella authored Apr 12, 2018
  297c1387
- [Power9]Legalize and emit code for converting (Un)Signed DWord to Quad-Precision · 10367eb4
  Lei Huang authored Apr 12, 2018
  10367eb4
- [AArch64] Move AFI->setRedZone(false) to top of emitPrologue · 8aa6cd5c
  Jessica Paquette authored Apr 12, 2018
  8aa6cd5c
- revert r328921 - [DAGCombine] (float)((int) f) --> ftrunc (PR36617) · 5ace2b76
  Sanjay Patel authored Apr 12, 2018
  5ace2b76
- [mips] Correct the predicates of the load/store (double)word for coprocessor 3. · d886aba3
  Simon Dardis authored Apr 12, 2018
  d886aba3
- [IRCE] isKnownNonNegative helper function · 97375359
  Sam Parker authored Apr 12, 2018
  97375359
- [mips] Correct the predicates for special nops, tlb ctrl instrs, software breakpoint and prefx. · a5a3c38c
  Simon Dardis authored Apr 12, 2018
  a5a3c38c
- [InstCombine][NFC]: Add tests: foldSelectICmpAndAnd(): and is commutative · 53271ba1
  Roman Lebedev authored Apr 12, 2018
  53271ba1
- [RISCV] Change function alignment to 4 bytes, and 2 bytes for RVC · b48b027d
  Shiva Chen authored Apr 12, 2018
  b48b027d
- [MIPS GlobalISel] minor update to MIR tests added in r329819 · 984db9ec
  Petar Jovanovic authored Apr 12, 2018
  984db9ec
- [NFC] fix trivial typos in documents and comments · bcadfee2
  Hiroshi Inoue authored Apr 12, 2018
  bcadfee2
- [RISCV] Codegen support for RV32D floating point comparison operations · 21d28fe8
  Alex Bradbury authored Apr 12, 2018
  21d28fe8
- [RISCV] Codegen support for RV32D floating point conversion operations · 60baa2e0
  Alex Bradbury authored Apr 12, 2018
  60baa2e0
- [RISCV] Add codegen support for RV32D floating point arithmetic operations · 5d0dfa5e
  Alex Bradbury authored Apr 12, 2018
  5d0dfa5e
- [RISCV] Add tests missed in r329871 · 8f296478
  Alex Bradbury authored Apr 12, 2018
  8f296478
- [DeadArgElim] Remove allocsize attributes on callsites · 48ee59b6
  George Burgess IV authored Apr 12, 2018
  48ee59b6
- Revert "[llvm-objcopy] Switch over to using TableGen for parsing arguments" · a8c689e7
  Jake Ehrlich authored Apr 12, 2018
  a8c689e7
- [llvm-objcopy] Switch over to using TableGen for parsing arguments · cafa1128
  Jake Ehrlich authored Apr 11, 2018
  cafa1128
Apr 11, 2018
- [PowerPC] Fix condition for 64-bit rotate when replacing r+r instr with r+i · c564dc06
  Nemanja Ivanovic authored Apr 11, 2018
  c564dc06
- Attempting to work around a non-determinism issue. · 0cba63c0
  Puyan Lotfi authored Apr 11, 2018
  0cba63c0
- [X86] Describe wbnoinvd instruction · 2ef36f35
  Gabor Buella authored Apr 11, 2018
  2ef36f35
- [DSE] Add tests for atomic memory intrinsics (NFC) · 381cdf3e
  Daniel Neilson authored Apr 11, 2018
  381cdf3e
- [DSE] Regenerate tests with update_test_checks.py (NFC) · 9cfa786f
  Daniel Neilson authored Apr 11, 2018
  9cfa786f
- CodeGen: Don't try to canonicalize Unix-style paths in CodeView debug info. · cb8a666f
  Peter Collingbourne authored Apr 11, 2018
  cb8a666f
- [X86][Atom] Convert Atom scheduler model to SchedRW (PR32431) · 8fc2b496
  Simon Pilgrim authored Apr 11, 2018
  8fc2b496
- [NVPTX] Removed 'satom' feature which is no longer used. · 2f8efcf3
  Artem Belevich authored Apr 11, 2018
  2f8efcf3
- [AMDGPU] Ensure there are enough registers for wave dispatch · fd8d4af3
  Tim Renouf authored Apr 11, 2018
  fd8d4af3