Commits · 60c8b8bcf232cfb0537f3d6638d8f36c29ef7095 · Raul Torres / llvm-target-spread · GitLab

Sep 06, 2019
- AMDGPU: Allow getMemOperandWithOffset to analyze stack accesses · 60c8b8bc
  Matt Arsenault authored Sep 05, 2019
  60c8b8bc
- AMDGPU: Fix emitting multiple stack loads for stack passed workitems · 59ff77ee
  Matt Arsenault authored Sep 05, 2019
  59ff77ee
- InstCombine: Fix crash on icmp of gep with addrspacecasted null · 524a9d57
  Matt Arsenault authored Sep 05, 2019
  524a9d57
- AMDGPU: Fix Register copypaste error · 2a7304c8
  Matt Arsenault authored Sep 05, 2019
  2a7304c8
- [SimplifyCFG] Don't SimplifyBranchOnICmpChain with ExtraCase · 9020f113
  Vitaly Buka authored Sep 05, 2019
  9020f113
- AMDGPU: Avoid constructing new std::vector in initCandidate · f54daffc
  Matt Arsenault authored Sep 05, 2019
  f54daffc
Sep 05, 2019
- [GSYM][NFC] Fixed -Wdocumentation warning · 59167992
  David Bolvansky authored Sep 05, 2019
  59167992
- [MIR] MIRNamer pass for improving MIR test authoring experience. · dc97ca9f
  Puyan Lotfi authored Sep 05, 2019
  dc97ca9f
- [globalisel][knownbits] Account for missing type constraints · f8032379
  Daniel Sanders authored Sep 05, 2019
  f8032379
- Recommit "[AArch64][GlobalISel] Teach AArch64CallLowering to handle basic sibling calls" · 20e86670
  Jessica Paquette authored Sep 05, 2019
  20e86670
- [IfConversion] Fix diamond conversion with unanalyzable branches. · cae1e47f
  Eli Friedman authored Sep 05, 2019
  cae1e47f
- [X86] Enable BuildSDIVPow2 for i16. · 0fde4121
  Craig Topper authored Sep 05, 2019
  0fde4121
- [Remarks] Don't serialize metadata if a string table is not used · 07f967d9
  Francis Visoiu Mistrih authored Sep 05, 2019
  07f967d9
- [X86] Override BuildSDIVPow2 for X86. · b8d6ba3c
  Craig Topper authored Sep 05, 2019
  b8d6ba3c
- [Support] Add writeFileAtomically() to FileUtilities · 00e04b0a
  Jan Korous authored Sep 05, 2019
  00e04b0a
- [InstCombine] foldICmpBinOp(): consider inverted check in 'unsigned sub overflow' check · 8360c42e
  Roman Lebedev authored Sep 05, 2019
  8360c42e
- [InstCombine] foldICmpBinOp(): consider inverted check in 'unsigned add overflow' check · ecb7ea1a
  Roman Lebedev authored Sep 05, 2019
  ecb7ea1a
- [x86] fix horizontal math bug exposed by improved demanded elements analysis (PR43225) · 10412a69
  Sanjay Patel authored Sep 05, 2019
  10412a69
- [X86] Add a FIXME about why the CWD/CDQ/CQO have a bogus implicit def of the A register. NFC · 97aa42f5
  Craig Topper authored Sep 05, 2019
  97aa42f5
- [X86] Fix stale comment. NFC · a5508163
  Craig Topper authored Sep 05, 2019
  a5508163
- [MergedLoadStoreMotion] Sink stores to BB with more than 2 predecessors · 58f172f0
  Denis Bakhvalov authored Sep 05, 2019
  58f172f0
- [MemorySSA] Verify MSSAUpdater exists. · 2ac69aad
  Alina Sbirlea authored Sep 05, 2019
  2ac69aad
- [PGO][CHR] Speed up following long, interlinked use-def chains. · d842f2ee
  Hiroshi Yamauchi authored Sep 05, 2019
  d842f2ee
- [MemorySSA] Update MemorySSA when removing debug.value calls. · ae900d38
  Alina Sbirlea authored Sep 05, 2019
  ae900d38
- [Hexagon] Fix type in HexagonTargetLowering::ReplaceNodeResults · 0ce93194
  Krzysztof Parzyszek authored Sep 05, 2019
  0ce93194
- [Alignment][NFC] Change internal representation of TargetLowering.h · f9f31ce6
  Guillaume Chatelet authored Sep 05, 2019
  f9f31ce6
- [ARM] Add support for the s,j,x,N,O inline asm constraints · a59bffb5
  David Candler authored Sep 05, 2019
  a59bffb5
- [X86][SSE] EltsFromConsecutiveLoads - ignore non-zero offset base loads (PR43227) · 29361c70
  Simon Pilgrim authored Sep 05, 2019
  29361c70
- [yaml2obj] Write the section header table after section contents · c3bc6979
  Fangrui Song authored Sep 05, 2019
  c3bc6979
- [ARM] Fixup the creation of VPT blocks · 83a33412
  David Green authored Sep 05, 2019
  83a33412
- [LLVM][Alignment] Convert isLegalNTStore/isLegalNTLoad to llvm::Align · 33671cef
  Guillaume Chatelet authored Sep 05, 2019
  33671cef
- [MIPS GlobalISel] Select G_FENCE · a4bfc8df
  Petar Avramovic authored Sep 05, 2019
  a4bfc8df
- [MIPS GlobalISel] Select llvm.trap intrinsic · f5c7fe07
  Petar Avramovic authored Sep 05, 2019
  f5c7fe07
- [MIPS GlobalISel] Lower SRet pointer arguments · d2574d79
  Petar Avramovic authored Sep 05, 2019
  d2574d79
- Revert rL370996 from llvm/trunk: [AArch64][GlobalISel] Teach... · 071287c5
  Simon Pilgrim authored Sep 05, 2019
  071287c5
- [X86] X86SpeculativeLoadHardeningPass::canHardenRegister - fix out of bounds warning. · 082750fe
  Simon Pilgrim authored Sep 05, 2019
  082750fe
- [SystemZ] Recognize INLINEASM_BR in backend · 82185878
  Jonas Paulsson authored Sep 05, 2019
  82185878
- [X86] X86InstrInfo::optimizeCompareInstr - fix potential null dereference. · 67991a59
  Simon Pilgrim authored Sep 05, 2019
  67991a59
- [LLVM][Alignment] Make functions using log of alignment explicit · aff45e4b
  Guillaume Chatelet authored Sep 05, 2019
  aff45e4b
- Fix time-trace breaking flame graph assumptions · c6fda60d
  Russell Gallop authored Sep 05, 2019
  c6fda60d