Commits · 637338543f1322ba13e5e48220931f4be347dc1f · Raul Torres / llvm-target-spread · GitLab

Jun 16, 2015
- [X86] Rename some frame lowering variables · 1c140bda
  Reid Kleckner authored Jun 16, 2015
  1c140bda
- Properly handle the mftb instruction. · 4f79f96f
  Kit Barton authored Jun 16, 2015
  4f79f96f
- [Hexagon] Alphabetical ordering of functions, NFC. · 6fea1af0
  Colin LeMahieu authored Jun 16, 2015
  6fea1af0
- Clean up redundant copies of Triple objects. NFC · c81f450f
  Daniel Sanders authored Jun 16, 2015
  c81f450f
- [mips][ias] Expand on r238751 to cover as many relocs as possible. · 58405d85
  Daniel Sanders authored Jun 16, 2015
  58405d85
- Replace string GNU Triples with llvm::Triple in TargetMachine::getTargetTriple(). NFC. · 335487ad
  Daniel Sanders authored Jun 16, 2015
  335487ad
- Recommit r239721: Replace string GNU Triples with llvm::Triple in InitMCObjectFileInfo. NFC. · 8d8b13dc
  Daniel Sanders authored Jun 16, 2015
  8d8b13dc
- [mips] [IAS] Refactor symbol-address loading code into a helper function. NFC. · 674825c6
  Toma Tabacu authored Jun 16, 2015
  674825c6
- [AVX512] add integer min/max intrinsics support. · 02d126cb
  Asaf Badouh authored Jun 16, 2015
  02d126cb
- X86: optimized i64 vector multiply with constant · 77f0e9f6
  Elena Demikhovsky authored Jun 16, 2015
  77f0e9f6
- [AArch64] Generalize extract-high DUP extension to MOVI/MVNI. · 8c7754b9
  Ahmed Bougacha authored Jun 16, 2015
  8c7754b9
- [X86] Try to shorten dwarf CFI emission · 7f189f83
  Reid Kleckner authored Jun 15, 2015
  7f189f83
Jun 15, 2015
- [Hexagon] PC-relative offsets are relative to packet start rather than the... · a071a8e5
  Colin LeMahieu authored Jun 15, 2015
  a071a8e5
- Protection against stack-based memory corruption errors using SafeStack · 82437bf7
  Peter Collingbourne authored Jun 15, 2015
  82437bf7
- MIR Serialization: Connect the machine function analysis pass to the MIR parser. · 735c47ec
  Alex Lorenz authored Jun 15, 2015
  735c47ec
- Remove duplicate conditional in if-stmt. · c30eae45
  Eric Christopher authored Jun 15, 2015
  c30eae45
- [Hexagon] Moving pass declarations out of header and in to implementation... · 56efafc0
  Colin LeMahieu authored Jun 15, 2015
  56efafc0
- [TargetInstrInfo] Add new hook: AnalyzeBranchPredicate. · 6b34a462
  Sanjoy Das authored Jun 15, 2015
  6b34a462
- [TargetInstrInfo] Rename getLdStBaseRegImmOfs and implement for x86. · b666ea36
  Sanjoy Das authored Jun 15, 2015
  b666ea36
- [CodeGen] Introduce a FAULTING_LOAD_OP pseudo-op. · c63244da
  Sanjoy Das authored Jun 15, 2015
  c63244da
- [NFC] Extract X86MCInstLower::LowerMachineOperand. · 2d869b23
  Sanjoy Das authored Jun 15, 2015
  2d869b23
- On behalf of Alexandros Lamprineas: · ff1f4be4
  Evgeny Astigeevich authored Jun 15, 2015
  ff1f4be4
- Revert r239721 - Replace string GNU Triples with llvm::Triple in InitMCObjectFileInfo. NFC. · fa555dc7
  Daniel Sanders authored Jun 15, 2015
  fa555dc7
- Replace string GNU Triples with llvm::Triple in InitMCObjectFileInfo. NFC. · d6d12a11
  Daniel Sanders authored Jun 15, 2015
  d6d12a11
- [AArch64] Delete two empty files, which should be removed by r239713. · 1c2e89a5
  Hao Liu authored Jun 15, 2015
  1c2e89a5
- [AArch64] Revert r239711 again. We need to discuss how to share code between... · d0ca8d7e
  Hao Liu authored Jun 15, 2015
  d0ca8d7e
- [AArch64] Match interleaved memory accesses into ldN/stN instructions. · cb070e38
  Hao Liu authored Jun 15, 2015
  cb070e38
Jun 14, 2015
- AVX-512: Implemented DAG lowering for shuff62x2/shufi62x2 instuctions (... · 5e496971
  Igor Breger authored Jun 14, 2015
  5e496971
- Add support for parsing the XOR operator in Intel syntax inline assembly. · e3de07a5
  Michael Kuperstein authored Jun 14, 2015
  e3de07a5
- AVX-512: Implemented cvtsi2ss/d cvtusi2ss/d instructions with round control for KNL. · abe4a79b
  Igor Breger authored Jun 14, 2015
  abe4a79b
Jun 13, 2015
- Stripped trailing whitespace. NFC. · a6f44a18
  Simon Pilgrim authored Jun 13, 2015
  a6f44a18
- AMDGPU: s/R600/AMDGPU/ in the Makefiles · 104ad064
  Tom Stellard authored Jun 13, 2015
  104ad064
- Rename TargetSubtargetInfo::enablePostMachineScheduler() to enablePostRAScheduler() · 39a2afc9
  Matthias Braun authored Jun 13, 2015
  39a2afc9
- MachineLICM: Use TargetSchedModel instead of just itineraries · 88e21315
  Matthias Braun authored Jun 13, 2015
  88e21315
- R600 -> AMDGPU rename · 45bb48ea
  Tom Stellard authored Jun 13, 2015
  45bb48ea
- AArch64: map bare-metal arm64-macho triple to MachO MC layer. · 02cfdbb7
  Tim Northover authored Jun 12, 2015
  02cfdbb7
Jun 12, 2015
- R600/SI: Add assembler support for FLAT instructions · 12a1910e
  Tom Stellard authored Jun 12, 2015
  12a1910e
- [Hexagon] Making intrinsic tests agnostic to register allocation. Narrowing... · 79ec0652
  Colin LeMahieu authored Jun 12, 2015
  79ec0652
- Wrap some long lines in LLVMBuild files. NFC · 8f01f1cf
  Douglas Katzman authored Jun 12, 2015
  8f01f1cf
- Remove a hack that tries to align '*'. · 0b9319ed
  Rafael Espindola authored Jun 12, 2015
  0b9319ed