Commits · 6452ba478638f1b40ff36727c766d7d16651d2b6 · Raul Torres / llvm-target-spread · GitLab

Mar 21, 2019
- Fix Mach-O bind and rebase validation errors in libObject · 02a2ce9a
  Michael Trent authored Mar 20, 2019
  02a2ce9a
Mar 20, 2019
- [WebAssembly][NFC] Fix formatting error from rL356610 · 5098f858
  Thomas Lively authored Mar 20, 2019
  5098f858
- [AMDGPU] Do not generate spurious PAL metadata · 2327c231
  Tim Renouf authored Mar 20, 2019
  2327c231
- Allow machine dce to remove uses in the same instruction · 0a11829a
  Stanislav Mekhanoshin authored Mar 20, 2019
  0a11829a
- [X86] Call lowerShuffleAsBitMask for 512-bit vectors in lowerShuffleAsBlend. · 03675533
  Craig Topper authored Mar 20, 2019
  03675533
- [AMDGPU] Fix dependency on `BinaryFormat` · bbcb95a6
  Michael Liao authored Mar 20, 2019
  bbcb95a6
- AMDGPU: Don't look for constant in insert/extract_vector_elt regbankselect · 2065206a
  Matt Arsenault authored Mar 20, 2019
  2065206a
- [WebAssembly] Target features section · f6f4f843
  Thomas Lively authored Mar 20, 2019
  f6f4f843
- [AMDGPU] Fix clamp bit DAG operand · eea5177d
  Michael Liao authored Mar 20, 2019
  eea5177d
- [ARC] Add ARCOptAddrMode pass to generate postincrement loads/stores. · b062239d
  Pete Couperus authored Mar 20, 2019
  b062239d
- AMDHSA: Fix COMPUTE_PGM_RSRC2.USER_SGPR calculation when parsing ISA assembly · 88268e3e
  Konstantin Zhuravlyov authored Mar 20, 2019
  88268e3e
- [ARM] Eliminate redundant "mov rN, sp" instructions in Thumb1. · 638be660
  Eli Friedman authored Mar 20, 2019
  638be660
- [Linker] Fix crash handling appending linkage · 6dc53ccb
  Rafael Auler authored Mar 20, 2019
  6dc53ccb
- [NFC] Fix brace indentation. · f69f8073
  Alina Sbirlea authored Mar 20, 2019
  f69f8073
- Resubmit r356511 "[TailCallElim] Add tailcall elimination pass to LTO pipelines" · f2158a8e
  Robert Lougher authored Mar 20, 2019
  f2158a8e
- [AMDGPU] Added MsgPack format PAL metadata · e7bd52f8
  Tim Renouf authored Mar 20, 2019
  e7bd52f8
- Simplify operands of masked stores and scatters based on demanded elements · e4588bbf
  Philip Reames authored Mar 20, 2019
  e4588bbf
- [LICM & MemorySSA] Don't sink/hoist stores in the presence of ordered loads. · 5baa72ea
  Alina Sbirlea authored Mar 20, 2019
  5baa72ea
- [ValueTracking] Compute range for abs without nsw · 00b5ecab
  Nikita Popov authored Mar 20, 2019
  00b5ecab
- [InstCombine] Fold add nuw + uadd.with.overflow · 37cf25c3
  Nikita Popov authored Mar 20, 2019
  37cf25c3
- [Remarks] Fix mismatched delete due to missing virtual destructor · becd797a
  Jordan Rupprecht authored Mar 20, 2019
  becd797a
- [AMDGPU] Factored PAL metadata handling out into its own class · d737b551
  Tim Renouf authored Mar 20, 2019
  d737b551
- [AMDGPU][MC] Corrected checks for DS offset0 range · 04bd1185
  Dmitry Preobrazhensky authored Mar 20, 2019
  04bd1185
- [CGP] fix formatting; NFC · a2250e92
  Sanjay Patel authored Mar 20, 2019
  a2250e92
- [CGP] convert chain of 'if' to 'switch'; NFC · d1ce455f
  Sanjay Patel authored Mar 20, 2019
  d1ce455f
- [AMDGPU][MC][GFX9] Added support of operands shared_base, shared_limit,... · 137976fa
  Dmitry Preobrazhensky authored Mar 20, 2019
  137976fa
- Remove out of date comment. NFCI. · 51f65171
  Simon Pilgrim authored Mar 20, 2019
  51f65171
- [ExpandMemCmp] Trigger on bcmp too. · 238af52d
  Clement Courbet authored Mar 20, 2019
  238af52d
- [X86] Use getConstantOperandAPInt to detect out-of-range shifts. · 2acca37a
  Simon Pilgrim authored Mar 20, 2019
  2acca37a
- [X86] Remove X86 specific dag nodes for RDTSC/RDTSCP/RDPMC. NFCI · 624f5def
  Andrea Di Biagio authored Mar 20, 2019
  624f5def
- [perf][DebugInfo] follow up for "add SectionedAddress to DebugInfo interfaces" · ba92e9bb
  Sylvestre Ledru authored Mar 20, 2019
  ba92e9bb
- [AMDGPU] Allow MIMG with no uses in adjustWritemask in isel · fc2a7473
  David Stuttard authored Mar 20, 2019
  fc2a7473
- [instcombine] Add todos describing missing transforms for masked.* intrinsics · 484d07c8
  Philip Reames authored Mar 20, 2019
  484d07c8
- Retry to add workaround to build scoped enums with VS2015. NFCI. · 16a8c541
  Douglas Yung authored Mar 20, 2019
  16a8c541
- Revert "Add workaround to build scoped enums with VS2015. NFCI." · 30ff4363
  Douglas Yung authored Mar 20, 2019
  30ff4363
- Add workaround to build scoped enums with VS2015. NFCI. · 6080a6fb
  Douglas Yung authored Mar 20, 2019
  6080a6fb
- [X86] Re-disable cmpxchg16b for 32-bit mode assembly parsing. · 97d104cb
  Craig Topper authored Mar 19, 2019
  97d104cb
Mar 19, 2019
- [ARM] Make sure to save/restore LR when we use tBfar. · 2596e8b3
  Eli Friedman authored Mar 19, 2019
  2596e8b3
- [AArch64][GlobalISel] Add an optimization to select vector DUP instructions. · 761ca2e5
  Amara Emerson authored Mar 19, 2019
  761ca2e5
- [AArch64][GlobalISel] Make v4s32 G_IMPLICIT_DEF legal. · 18e2c572
  Amara Emerson authored Mar 19, 2019
  18e2c572