Commits · 7373ae5c9a07f216f55e9059e11ce8092646c4f3 · Raul Torres / llvm-target-spread · GitLab

Mar 01, 2018
- [InstCombine] allow fmul fold with less than 'fast' · 7373ae5c
  Sanjay Patel authored Mar 01, 2018
  7373ae5c
- [NFC] Move CommentOpts checks to the call sites that depend on it. · 40388bdf
  David L. Jones authored Mar 01, 2018
  40388bdf
- [DAGCombiner] When combining zero_extend of a truncate, only mask before extending for vectors. · e7ca6f54
  Craig Topper authored Mar 01, 2018
  e7ca6f54
- [Driver] Pass -f[no-]emulated-tls and set up ExplicitEmulatedTLS · ca552b8d
  Chih-Hung Hsieh authored Mar 01, 2018
  ca552b8d
- Don't ingoned --enable-new-dtags. · 2e4bcb00
  Rafael Espindola authored Mar 01, 2018
  2e4bcb00
- [X86][MMX] Improve handling of 64-bit MMX constants · 90fd0622
  Simon Pilgrim authored Mar 01, 2018
  90fd0622
- [modules] Don't diagnose "redefinition" of a friend with a pending definition · 05ce1d39
  Richard Smith authored Mar 01, 2018
  05ce1d39
- [SelectionDAG] Support some SimplifySetCC cases for comparing against vector splats of constants. · eedfbc4a
  Craig Topper authored Mar 01, 2018
  eedfbc4a
- [X86][AVX] Add v2f32 <-> v2i8/v2i16/v2i32 vector tests · e57167fa
  Simon Pilgrim authored Mar 01, 2018
  e57167fa
- [www] Capitalize "Clang" when referring to the project, and generalize the · d9d42f9c
  Richard Smith authored Mar 01, 2018
  d9d42f9c
- [Hexagon] Add trap1 instruction · c5e0ed10
  Krzysztof Parzyszek authored Mar 01, 2018
  c5e0ed10
- Add an llc testcase analogous to test/LTO/X86/strip-debug-info.ll · 17dd0edf
  Adrian Prantl authored Mar 01, 2018
  17dd0edf
- AMDGPU/GlobalISel: Define instruction mapping for @llvm.amdgcn.cvt.pkrtz · 364f12e8
  Matt Arsenault authored Mar 01, 2018
  364f12e8
- AMDGPU/GlobalISel: Define instruction mapping for G_OR · 5320ee4a
  Matt Arsenault authored Mar 01, 2018
  5320ee4a
- [X86][SSE] Regenerate float to/from i8/i16 vector tests · c6f4a6a0
  Simon Pilgrim authored Mar 01, 2018
  c6f4a6a0
- AMDGPU/GlobalISel: Remove default register mapping · e65404f5
  Matt Arsenault authored Mar 01, 2018
  e65404f5
- [AArch64] Clean up code (NFC) · 2bbb4a7c
  Evandro Menezes authored Mar 01, 2018
  2bbb4a7c
- Added P0805 to the list of ready bits · aadaabe6
  Marshall Clow authored Mar 01, 2018
  aadaabe6
- [X86][SSE] Regenerate odd sized sext/zext tests · 94ea374b
  Simon Pilgrim authored Mar 01, 2018
  94ea374b
- AMDGPU/GlobalISel: Use a more correct getValueMapping · 1422a19a
  Matt Arsenault authored Mar 01, 2018
  1422a19a
- AMDGPU/GlobalISel: Define instruction mapping for G_BITCAST · 62669ede
  Matt Arsenault authored Mar 01, 2018
  62669ede
- AMDGPU/GlobalISel: Mark i32->i64 zext as legal · 0529a8e2
  Matt Arsenault authored Mar 01, 2018
  0529a8e2
- [AArch64] Add support for secrel add/load/store relocations for COFF · c61ff3be
  Martin Storsjö authored Mar 01, 2018
  c61ff3be
- AMDGPU/GlobalISel: InstrMapping for llvm.amdgcn.exp.compr · 36b99e19
  Matt Arsenault authored Mar 01, 2018
  36b99e19
- [MinGW] Fix --{start,end}-group. · b34bd34f
  Rui Ueyama authored Mar 01, 2018
  b34bd34f
- AMDGPU/GlobalISel: Define instruction mapping for @llvm.amdgcn.exp · 8931bbf8
  Matt Arsenault authored Mar 01, 2018
  8931bbf8
- [RecordLayout] Only assert that fundamental type sizes are power of two on MSVC · 87c2ad29
  Martin Storsjö authored Mar 01, 2018
  87c2ad29
- [SimplifyLibCalls] Update an obviously copy and pasted header comment to match this file. NFC · 2915bc00
  Craig Topper authored Mar 01, 2018
  2915bc00
- [InstCombine] Auto-generate complete checks. NFC · f1a7c675
  Craig Topper authored Mar 01, 2018
  f1a7c675
- AMDGPU/GlobalISel: Define InstrMappings for G_ICMP · 50721ab3
  Matt Arsenault authored Mar 01, 2018
  50721ab3
- AMDGPU/GlobalISel: Make i32 mul legal · dc14ec05
  Matt Arsenault authored Mar 01, 2018
  dc14ec05
- AMDGPU/GlobalISel: Define instruction mapping for G_IMPLICIT_DEF · 06cbb27a
  Matt Arsenault authored Mar 01, 2018
  06cbb27a
- Driver: hoist `-fno-rtti-data` to a driver flag · cc623815
  Saleem Abdulrasool authored Mar 01, 2018
  cc623815
- AMDGPU/GlobalISel: Define instruction mapping for G_FCONSTANT · e3d9ecf2
  Matt Arsenault authored Mar 01, 2018
  e3d9ecf2
- AMDGPU/GlobalISel: Add copyCost for VGPR->SGPR copies · 51b0b200
  Matt Arsenault authored Mar 01, 2018
  51b0b200
- AMDGPU/GlobalISel: Make i32 xor legal · 3f6a204e
  Matt Arsenault authored Mar 01, 2018
  3f6a204e
- AMDGPU/GlobalISel: Mark 32/64-bit G_FCMP as legal · 8e80a5fb
  Matt Arsenault authored Mar 01, 2018
  8e80a5fb
- AMDGPU/GlobalISel: Mark 32-bit G_FPTOSI as legal · dd022ce0
  Matt Arsenault authored Mar 01, 2018
  dd022ce0
- Correct man page description for --section-start · 9a289f7b
  Ed Maste authored Mar 01, 2018
  9a289f7b
- [analyzer] Enable cfg-temporary-dtors by default. · 61199443
  Artem Dergachev authored Mar 01, 2018
  61199443