Commits · 73d18aa028b367ef68c543f15f10427a4d1cb471 · Raul Torres / llvm-target-spread · GitLab

Sep 28, 2018
- [ScalarizeMaskedMemIntrin] Use MinAlign to calculate alignment for the scalar... · bb50c386
  Craig Topper authored Sep 28, 2018
  bb50c386
- [pdb] Simplify the code by replacing a few string conversions with calls to invokeBstrMethod() · 757274f9
  Aaron Smith authored Sep 28, 2018
  757274f9
- [ORC] clang-format the ThreadSafeModule code. · 4328ea34
  Lang Hames authored Sep 28, 2018
  4328ea34
- [ScalarizeMaskedMemIntrin] Fix the alignment calculation for the scalar stores... · fdf4c76c
  Craig Topper authored Sep 28, 2018
  fdf4c76c
- [ScalarizeMaskedMemIntrin] Ensure the mask is a vector of ConstantInts before... · 8b4f0e1b
  Craig Topper authored Sep 27, 2018
  8b4f0e1b
- [ScalarizeMaskedMemIntrin] Use cast instead of dyn_cast checked by an assert.... · 10ec0216
  Craig Topper authored Sep 27, 2018
  10ec0216
- WebAssembly: Rename GetSignature to GetLibcallSignature [NFC] · 70ce1af9
  Derek Schuff authored Sep 27, 2018
  70ce1af9
Sep 27, 2018
- [ScalarizeMaskedMemIntrin] When expanding masked gathers, start with the... · 6911bfe2
  Craig Topper authored Sep 27, 2018
  6911bfe2
- [ScalarizeMaskedMemIntrin] When expanding masked loads, start with the... · 7d234d66
  Craig Topper authored Sep 27, 2018
  7d234d66
- [ScalarizeMaskedMemIntrin] Handle the case where the mask is an all zero vector. · dfc0f289
  Craig Topper authored Sep 27, 2018
  dfc0f289
- [ScalarizeMaskedMemIntrin] Remove some temporary variables that are only used... · dfe460db
  Craig Topper authored Sep 27, 2018
  dfe460db
- [ScalarizeMaskedMemIntrin] Cleanup comments. NFC · 49dad8b8
  Craig Topper authored Sep 27, 2018
  49dad8b8
- [ORC] Add definition for IRLayer::setCloneToNewContextOnEmit, use it to set the · 8b81395d
  Lang Hames authored Sep 27, 2018
  8b81395d
- AMDGPU: Split HasExt into HasExtDPP/SDWA/SDWA9 · 5f1b8181
  Konstantin Zhuravlyov authored Sep 27, 2018
  5f1b8181
- AMDGPU: Split VOP2Inst into VOP2Inst_e32/e64/sdwa · 9da26b20
  Konstantin Zhuravlyov authored Sep 27, 2018
  9da26b20
- [ORC] Coalesce all of ORC's symbol renaming / linkage-promotion utilities into · c5192f75
  Lang Hames authored Sep 27, 2018
  c5192f75
- AMDGPU/NFC: Simplify VOP_MAC_F16/F32 · 7d424aae
  Konstantin Zhuravlyov authored Sep 27, 2018
  7d424aae
- [AMDGPU] Fold copy (copy vgpr) · b080adfc
  Stanislav Mekhanoshin authored Sep 27, 2018
  b080adfc
- [ScalarizeMaskedMemIntrin] Don't emit 'icmp eq i1 %x, 1' to check mask values.... · 0423681d
  Craig Topper authored Sep 27, 2018
  0423681d
- [X86] Remove BT/BTC/BTR/BTS rr/ri overrides · 2a64d393
  Simon Pilgrim authored Sep 27, 2018
  2a64d393
- [X86][Btver2] (V)MPSADBW instructions take 3uops not 1 · 86c7b07e
  Simon Pilgrim authored Sep 27, 2018
  86c7b07e
- Revert r343192 as an ubsan build is currently failing · 8e5676b1
  Luke Cheeseman authored Sep 27, 2018
  8e5676b1
- [X86][Btver2] BTC/BTR/BTS instructions take 2uops not 1 · dd744f15
  Simon Pilgrim authored Sep 27, 2018
  dd744f15
- [X86] Split BT and BTC/BTR/BTS scheduler classes · 29cf499b
  Simon Pilgrim authored Sep 27, 2018
  29cf499b
- [Sparc] EXPENSIVE_CHECKS now passes all machine verifier errors (PR27461) · 06ccc9d9
  Simon Pilgrim authored Sep 27, 2018
  06ccc9d9
- [AArch64] Refactor immediate details out of add/sub tblgen class (NFCI) · 2721e6f0
  Oliver Stannard authored Sep 27, 2018
  2721e6f0
- [AArch64][v8.5A] Add speculation barriers SSBB and PSSBB · a4f68bf4
  Oliver Stannard authored Sep 27, 2018
  a4f68bf4
- [InstCombine] Without infinites, fold (C / X) < 0.0 --> (X < 0) · c3f50ff9
  Sanjay Patel authored Sep 27, 2018
  c3f50ff9
- [X86][Btver2] BLSI/BLSMSK/BLSR instructions take 2uops not 1 (same as TZCNT) · c2a88ea6
  Simon Pilgrim authored Sep 27, 2018
  c2a88ea6
- [WPD] Fix incorrect devirtualization after indirect call promotion · f24136f1
  Teresa Johnson authored Sep 27, 2018
  f24136f1
- [AArch64][v8.5A] Add Branch Target Identification instructions · a9a5eee1
  Oliver Stannard authored Sep 27, 2018
  a9a5eee1
- [AArch64][v8.5A] Add speculation restriction system registers · 8459d34e
  Oliver Stannard authored Sep 27, 2018
  8459d34e
- [AArch64][v8.5A] Add Armv8.5-A random number instructions · dc837e3f
  Oliver Stannard authored Sep 27, 2018
  dc837e3f
- [AArch64][v8.5A] Add Armv8.5-A "DC CVADP" instruction · 6930b12d
  Oliver Stannard authored Sep 27, 2018
  6930b12d
- [AArch64][v8.5A] Add prediction invalidation instructions to AArch64 · 224428c0
  Oliver Stannard authored Sep 27, 2018
  224428c0
- [ARM][v8.5A] Add speculation barrier to ARM & Thumb instruction sets · 382c935c
  Oliver Stannard authored Sep 27, 2018
  382c935c
- [AArch64][v8.5A] Add speculation barrier to AArch64 instruction set · e481f1d9
  Oliver Stannard authored Sep 27, 2018
  e481f1d9
- [Sparc] Remove the support for builtin setjmp/longjmp · 0c05bdea
  Daniel Cederman authored Sep 27, 2018
  0c05bdea
- [AArch64][v8.5A] Add FRINT[32,64][Z,X] instructions · ddb7d46a
  Oliver Stannard authored Sep 27, 2018
  ddb7d46a
- [Sparc] Add unimp alias · b35d3a27
  Daniel Cederman authored Sep 27, 2018
  b35d3a27