Commits · 9a2350e45950e13d3d3a0ff318c10912ffef9d32 · Raul Torres / llvm-target-spread · GitLab

Jul 17, 2014
- [NVPTX] Add more surface/texture intrinsics, including CUDA unified texture fetch · 9a2350e4
  Justin Holewinski authored Jul 17, 2014
  9a2350e4
- ARM: support direct f16 <-> f64 conversions · 53f3bcf0
  Tim Northover authored Jul 17, 2014
  53f3bcf0
- [TABLEGEN] Do not crash on intrinsics with names longer than 40 characters · 8a5bf7fa
  Justin Holewinski authored Jul 17, 2014
  8a5bf7fa
- CodeGen: generate single libcall for fptrunc -> f16 operations. · 84ce0a64
  Tim Northover authored Jul 17, 2014
  84ce0a64
- X86: support double extension of f16 type. · 21310448
  Tim Northover authored Jul 17, 2014
  21310448
- CodeGen: extend f16 conversions to permit types > float. · fd7e4249
  Tim Northover authored Jul 17, 2014
  fd7e4249
- Port memory barriers intrinsics to AArch64 · 2355066e
  Yi Kong authored Jul 17, 2014
  2355066e
- [mips] .reginfo is 8 byte aligned on N32. · 701e9616
  Daniel Sanders authored Jul 17, 2014
  701e9616
- [mips] Correct ELF e_flags for the N32 ABI when using a mips-* triple rather than a mips64-* triple · 7f70573e
  Daniel Sanders authored Jul 17, 2014
  7f70573e
- [mips] Correct .MIPS.abiflags for -mfpxx on MIPS32r6 · 185f23ad
  Daniel Sanders authored Jul 17, 2014
  185f23ad
- [mips] Fix ELF e_flags related to -mabicalls and -mplt. · 16ec6c19
  Daniel Sanders authored Jul 17, 2014
  16ec6c19
- Fix the prefix for arm64 triple · 7d78ab57
  Yi Kong authored Jul 17, 2014
  7d78ab57
- [msan] Avoid redundant origin stores. · c8227aa1
  Evgeniy Stepanov authored Jul 17, 2014
  c8227aa1
- Move ashr optimization from InstCombineShift to InstSimplify. · 68862414
  Suyog Sarda authored Jul 17, 2014
  68862414
- Use range for · ac6e39cf
  Matt Arsenault authored Jul 17, 2014
  ac6e39cf
- R600: Short circuit alloca check if address space isn't private. · 5e2b0f51
  Matt Arsenault authored Jul 17, 2014
  5e2b0f51
- Fix Typo (first commit to test commit access) · de409fd7
  Suyog Sarda authored Jul 17, 2014
  de409fd7
- [lit] Add --show-unsupported flag to LIT · 5cfa2e46
  Eric Fiselier authored Jul 17, 2014
  5cfa2e46
- MC: make WinEH opcode an opaque value · ab820860
  Saleem Abdulrasool authored Jul 17, 2014
  ab820860
- Improve BasicAA CS-CS queries (redux) · 354e23b0
  Hal Finkel authored Jul 17, 2014
  354e23b0
- Partially revert r210444 due to performance regression · 0bdc027e
  Jingyue Wu authored Jul 16, 2014
  0bdc027e
- Fixed formatting, removed bug reference, renamed testcase · d3bbfa1c
  Sanjay Patel authored Jul 16, 2014
  d3bbfa1c
- [FastISel] Local values shouldn't be alive across an inline asm call with side effects. · 618ce3e8
  Juergen Ributzka authored Jul 16, 2014
  618ce3e8
- [MCJIT] Improve a RuntimeDyldChecker diagnostic. · 8b205306
  Lang Hames authored Jul 16, 2014
  8b205306
Jul 16, 2014
- Fix a typo in the inalloca description · c8491d3d
  Hal Finkel authored Jul 16, 2014
  c8491d3d
- trivial fix for PR20314 · ab60d043
  Sanjay Patel authored Jul 16, 2014
  ab60d043
- Remove Atom references in description. · 6360441f
  Sanjay Patel authored Jul 16, 2014
  6360441f
- Utilize CastInst::CreatePointerBitCastOrAddrSpaceCast here. · 405fb182
  Manuel Jacob authored Jul 16, 2014
  405fb182
- [RegisterCoalescer] Moving the RegisterCoalescer subtarget hook onto the... · df4b763b
  Chris Bieneman authored Jul 16, 2014
  df4b763b
- [NVPTX] Honor alignment on vector loads/stores · ac451066
  Justin Holewinski authored Jul 16, 2014
  ac451066
- CHECK-LABEL-ize one test · 62a8e063
  Alexey Samsonov authored Jul 16, 2014
  62a8e063
- Add the "-x" flag to llvm-nm for Mach-O files that prints the fields of a symbol in hex. · 77b968e1
  Kevin Enderby authored Jul 16, 2014
  77b968e1
- Remove unnecessary/redundant std::move · 07557be6
  David Blaikie authored Jul 16, 2014
  07557be6
- Track clang r213171 · 40a93aec
  Alp Toker authored Jul 16, 2014
  40a93aec
- Added documentation for SizeMultiplier in the ARM subtarget hook for register... · 80a866a3
  Chris Bieneman authored Jul 16, 2014
  80a866a3
- [NVPTX] Rename registers %fl -> %fd and %rl -> %rd · 3e037d98
  Justin Holewinski authored Jul 16, 2014
  3e037d98
- CodeGen: don't form illegail EXTLOAD operations. · 7f3e11e7
  Tim Northover authored Jul 16, 2014
  7f3e11e7
- Convert test to CHECK-LABEL · db8011a4
  Tim Northover authored Jul 16, 2014
  db8011a4
- [mips][fp64a] Temporarily disable odd-numbered double-precision registers when using the FP64A ABI. · 68dcb4ff
  Daniel Sanders authored Jul 16, 2014
  68dcb4ff
- [X86] Add a check for 'isMOVHLPSMask' within method 'isShuffleMaskLegal'. · a03624d8
  Andrea Di Biagio authored Jul 16, 2014
  a03624d8