Commits · a49d68e0784c46c42b8668e7b7def4caa7cf0778 · Raul Torres / llvm-target-spread · GitLab

Aug 13, 2014
- Canonicalize header guards into a common format. · a7c40ef0
  Benjamin Kramer authored Aug 13, 2014
  a7c40ef0
Apr 28, 2014
- [C++] Use 'nullptr'. · e73658dd
  Craig Topper authored Apr 28, 2014
  e73658dd
Apr 02, 2014
- Simplify resolveFrameIndex() signature. · 36c49533
  Jim Grosbach authored Apr 02, 2014
  36c49533
Mar 23, 2014
- Prune includes in ARM target. · a9253267
  Craig Topper authored Mar 22, 2014
  a9253267
Mar 10, 2014
- [C++11] Add 'override' keyword to virtual methods that override their base class. · 6bc27bf3
  Craig Topper authored Mar 10, 2014
  6bc27bf3
Jun 07, 2013
- Don't cache the instruction and register info from the TargetMachine, because · f95178e6
  Bill Wendling authored Jun 07, 2013
  f95178e6
Feb 21, 2013
- Move the eliminateCallFramePseudoInstr method from TargetRegisterInfo · 8da87163
  Eli Bendersky authored Feb 21, 2013
  8da87163
Jan 31, 2013
- [PEI] Pass the frame index operand number to the eliminateFrameIndex function. · df782d22
  Chad Rosier authored Jan 31, 2013
  df782d22
May 08, 2012
- Add an MF argument to TRI::getPointerRegClass() and TII::getRegClass(). · 3c52f028
  Jakob Stoklund Olesen authored May 07, 2012
  3c52f028
Mar 17, 2012
- Reorder includes to match coding standards. Fix an issue or two exposed by that. · 188ed9d5
  Craig Topper authored Mar 17, 2012
  188ed9d5
Apr 26, 2011
- Add a TRI::getLargestLegalSuperClass hook to provide an upper limit on register class inflation. · 803a2000
  Jakob Stoklund Olesen authored Apr 26, 2011
  803a2000
Apr 01, 2011
- Provide a legal pointer register class when targeting thumb1. · 07093426
  Jakob Stoklund Olesen authored Mar 31, 2011
  07093426
Mar 05, 2011
- Implement frame unwinding information emission for Thumb1. Not finished yet... · a8d177b2
  Anton Korobeynikov authored Mar 05, 2011
  a8d177b2
Nov 18, 2010
- Move hasFP() and few related hooks to TargetFrameInfo. · 0eecf5d2
  Anton Korobeynikov authored Nov 18, 2010
  0eecf5d2
Nov 15, 2010
- First step of huge frame-related refactoring: move emit{Prologue,Epilogue} out... · f7183edb
  Anton Korobeynikov authored Nov 15, 2010
  f7183edb
Aug 27, 2010
- Simplify eliminateFrameIndex() interface back down now that PEI doesn't need · 6a770669
  Jim Grosbach authored Aug 26, 2010
  6a770669
Aug 19, 2010
- Add Thumb1 support for virtual frame indices. · 8c58bd30
  Jim Grosbach authored Aug 19, 2010
  8c58bd30
Jul 20, 2010
- Constify some arguments. · 4adaccf0
  Eric Christopher authored Jul 20, 2010
  4adaccf0
Jul 11, 2010
- Make getPhysicalRegisterRegClass non-virtual. Should be able to remove it soon. · 1da1cfcc
  Rafael Espindola authored Jul 11, 2010
  1da1cfcc
Jun 02, 2010
- Clean up 80 column violations. No functional change. · 84511e15
  Jim Grosbach authored Jun 02, 2010
  84511e15
Mar 09, 2010
- Change the Value argument to eliminateFrameIndex to a type-tagged value. This · fae913ad
  Jim Grosbach authored Mar 09, 2010
  fae913ad
Nov 07, 2009
- 80-column cleanup of file header comments · 4e9f3795
  Jim Grosbach authored Nov 07, 2009
  4e9f3795
Oct 28, 2009
- Cleanup now that frame index scavenging via post-pass is working for ARM and Thumb2. · 294aea70
  Jim Grosbach authored Oct 28, 2009
  294aea70
Oct 22, 2009
- Missing piece of the ARM frame index post-scavenging conditionalization · f2e74df1
  Jim Grosbach authored Oct 21, 2009
  f2e74df1
Oct 20, 2009
- Now that all ARM subtargets use frame index scavenging, the Thumb1 requires* · 34f040a5
  Jim Grosbach authored Oct 20, 2009
  34f040a5
- Adjust the scavenge register spilling to allow the target to choose an · 5a5a3bc5
  Jim Grosbach authored Oct 19, 2009
  5a5a3bc5
Oct 08, 2009
- Re-enable register scavenging in Thumb1 by default. · c0615aa1
  Jim Grosbach authored Oct 08, 2009
  c0615aa1
- reverting thumb1 scavenging default due to test failure while I figure out what's up. · 456735c5
  Jim Grosbach authored Oct 07, 2009
  456735c5
- Enable thumb1 register scavenging by default. · 37cf79e5
  Jim Grosbach authored Oct 07, 2009
  37cf79e5
Oct 07, 2009
- Add register-reuse to frame-index register scavenging. When a target uses · fa14dd43
  Jim Grosbach authored Oct 07, 2009
  fa14dd43
Oct 06, 2009
- In Thumb1, the register scavenger is not always able to use an emergency · 2dfb5da6
  Jim Grosbach authored Oct 05, 2009
  2dfb5da6
Aug 11, 2009
- Split EVT into MVT and EVT, the former representing _just_ a primitive type, while · 9f94459d
  Owen Anderson authored Aug 11, 2009
  9f94459d
- Rename MVT to EVT, in preparation for splitting SimpleValueType out into its own struct type. · 53aa7a96
  Owen Anderson authored Aug 10, 2009
  53aa7a96
Jul 28, 2009
- - More refactoring. This gets rid of all of the getOpcode calls. · 780748d5
  Evan Cheng authored Jul 28, 2009
  780748d5
Jul 26, 2009
- Refactor. Get rid of a few more getOpcode() calls. · 8953720f
  Evan Cheng authored Jul 26, 2009
  8953720f
Jul 24, 2009
- Correctly handle the Thumb-2 imm8 addrmode. Specialize frame index elimination... · cdd405d8
  David Goodwin authored Jul 24, 2009
  cdd405d8
Jul 16, 2009
- Let callers decide the sub-register index on the def operand of rematerialized instructions. · 84517443
  Evan Cheng authored Jul 16, 2009
  84517443
Jul 08, 2009
- Generalize opcode selection in ARMBaseRegisterInfo. · 03ab0bbb
  David Goodwin authored Jul 08, 2009
  03ab0bbb
- Push methods into base class in preparation for sharing. · 9ca33e8a
  David Goodwin authored Jul 08, 2009
  9ca33e8a
Jul 03, 2009
- Checkpoint refactoring of ThumbInstrInfo and ThumbRegisterInfo into... · ade05a37
  David Goodwin authored Jul 02, 2009
  ade05a37