Commits · b435a5ff5eb9a7b69c1a5fef03618f7f2c1d0295 · Raul Torres / llvm-target-spread · GitLab

Apr 26, 2017
- [AVR] Remove an unused local variable · 828bd616
  Dylan McKay authored Apr 26, 2017
  828bd616
- [mips] Fix test mips64fpldst.ll with machine verifier enabled · b458b468
  Sagar Thakur authored Apr 26, 2017
  b458b468
- [X86] Add missing mayLoad/mayStore attributes to some X86 instructions (Continue) · 11966ab0
  Ayman Musa authored Apr 26, 2017
  11966ab0
- [mips] Rework a portion of MipsCC interface. (NFC) · 70f79251
  Simon Dardis authored Apr 26, 2017
  70f79251
- PR31007 and PR27884 will be closed: a possibility to compile constants like... · c3c6723a
  Andrew V. Tischenko authored Apr 26, 2017
  c3c6723a
- [X86][SSE2] Fix asm string for movq (Move Quadword) instruction. · d9fb1578
  Ayman Musa authored Apr 26, 2017
  d9fb1578
- [AMDGPU] Garbage collect dead code. NFCI. · 0316f7ae
  Davide Italiano authored Apr 26, 2017
  0316f7ae
- [MSP430] Fix PR32769: Select8 and Select16 need to have SR in Uses. · d91fb8c3
  Vadzim Dambrouski authored Apr 26, 2017
  d91fb8c3
- [AVR] Do not kill the dest register for a pseudo instruction · ff49a055
  Dylan McKay authored Apr 25, 2017
  ff49a055
- AMDGPU: Shift down reserved SP register like scratch wave offset · 36c3122e
  Matt Arsenault authored Apr 25, 2017
  36c3122e
Apr 25, 2017
- AMDGPU: Clean up VOP3NoMods pattern · df58e825
  Matt Arsenault authored Apr 25, 2017
  df58e825
- AMDGPU: Fix ValueKind code object metadata for images · 54ba4312
  Konstantin Zhuravlyov authored Apr 25, 2017
  54ba4312
- [Hexagon] Only increment debug counters if debug option is present · 9ebbe5bf
  Krzysztof Parzyszek authored Apr 25, 2017
  9ebbe5bf
- [SelectionDAG] Added getBuildVector(ArrayRef<SDUse>) helper. · d6878580
  Simon Pilgrim authored Apr 25, 2017
  d6878580
- [AVR] Support the LDWRdPtr instruction with the same Src+Dst register · 8f515b1e
  Dylan McKay authored Apr 25, 2017
  8f515b1e
Apr 24, 2017
- AMDGPU: Slightly simplify prolog reserved register handling · e2218494
  Matt Arsenault authored Apr 24, 2017
  e2218494
- Move value type list from TargetRegisterClass to TargetRegisterInfo · c8e8e2a0
  Krzysztof Parzyszek authored Apr 24, 2017
  c8e8e2a0
- Revert r301231: Accidentally committed stale files · 98ab4c64
  Krzysztof Parzyszek authored Apr 24, 2017
  98ab4c64
- Move value type list from TargetRegisterClass to TargetRegisterInfo · c0197066
  Krzysztof Parzyszek authored Apr 24, 2017
  c0197066
- AMDGPU: Select scratch mubuf offsets when pointer is a constant · 0774ea26
  Matt Arsenault authored Apr 24, 2017
  0774ea26
- AMDGPU: Set StackGrowsUp in MCAsmInfo · df6539f4
  Matt Arsenault authored Apr 24, 2017
  df6539f4
- [AMDGPU] Merge M0 initializations · bd5394be
  Stanislav Mekhanoshin authored Apr 24, 2017
  bd5394be
- Move size and alignment information of regclass to TargetRegisterInfo · 44e25f37
  Krzysztof Parzyszek authored Apr 24, 2017
  44e25f37
- CodeGen: Add a hook for getFenceOperandTy · fd23a0c0
  Yaxun Liu authored Apr 24, 2017
  fd23a0c0
- X86RegisterInfo: eliminateFrameIndex: Avoid code duplication; NFC · f9796b76
  Matthias Braun authored Apr 24, 2017
  f9796b76
- AMDGPU: Add StackPtr and FramePtr registers to MFI · 1c0ae397
  Matt Arsenault authored Apr 24, 2017
  1c0ae397
- AMDGPU: Move trap lowering to DAG · 3e02538a
  Matt Arsenault authored Apr 24, 2017
  3e02538a
- AMDGPU: Move v_readlane lane select from VGPR to SGPR · 5dea6451
  Nicolai Haehnle authored Apr 24, 2017
  5dea6451
- [GlobalISel][X86] Lower FormalArgument/Ret using G_MERGE_VALUES/G_UNMERGE_VALUES. · 87aafa07
  Igor Breger authored Apr 24, 2017
  87aafa07
- AMDGPU: Fix crash when scheduling non-memory SMRD instructions · ef449787
  Nicolai Haehnle authored Apr 24, 2017
  ef449787
- [SystemZ] Update kill-flag in splitMove(). · 1e864857
  Jonas Paulsson authored Apr 24, 2017
  1e864857
- [ARM] GlobalISel: Legalize s8 and s16 G_(S|U)DIV · f53865da
  Diana Picus authored Apr 24, 2017
  f53865da
- [Arch64AsmParser] better diagnostic for isb · e5b8557d
  Sjoerd Meijer authored Apr 24, 2017
  e5b8557d
- [ARM] GlobalISel: Support G_(S|U)DIV for s32 · b70e88bd
  Diana Picus authored Apr 24, 2017
  b70e88bd
- [ARM] GlobalISel: Select G_CONSTANT with CImm operands · 95a8aa93
  Diana Picus authored Apr 24, 2017
  95a8aa93
Apr 23, 2017
- [X86][SSE] Add scheduler class support for SSE42 (PCMPGT) instructions · 06d62633
  Simon Pilgrim authored Apr 23, 2017
  06d62633
- Revert "[APInt] Fix a few places that use APInt::getRawData to operate within the normal API." · 4abfb3d7
  Renato Golin authored Apr 23, 2017
  4abfb3d7
- [X86][MPX] Add load & store instructions of bnd values to getLoadStoreRegOpcode function. · 137c44fe
  Ayman Musa authored Apr 23, 2017
  137c44fe
- [APInt] Fix a few places that use APInt::getRawData to operate within the normal API. · 474e5de7
  Craig Topper authored Apr 23, 2017
  474e5de7
- [APInt] Use operator<<= where possible. NFC · cdd5ae66
  Craig Topper authored Apr 23, 2017
  cdd5ae66