Commits · c20f5d2246ad445a91cd4e190502b7909700cb86 · Raul Torres / llvm-target-spread · GitLab

Dec 27, 2012
- Define COMPILER_RT_CAN_EXECUTE_TESTS variable on platforms where we can... · c20f5d22
  Alexey Samsonov authored Dec 27, 2012
  c20f5d22
- Add support to BasicBlocks for iterating backwards over the · 3edd52c1
  Chandler Carruth authored Dec 27, 2012
  3edd52c1
- Provide a common half-open interval map info implementation, and just · a3c0d67d
  Chandler Carruth authored Dec 27, 2012
  a3c0d67d
- Make this parameter be named consistently with most other · e40e60ee
  Chandler Carruth authored Dec 27, 2012
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- docs: Add FAQ about "storing to a virtual register". · 0f2eabce
  Sean Silva authored Dec 27, 2012
  0f2eabce
- docs: Move link to the new "external tutorials" area. · 33fc6cff
  Sean Silva authored Dec 27, 2012
  33fc6cff
- [ASan] Fix lifetime intrinsics handling. Now for each intrinsic we check if it... · 29dd7f20
  Alexey Samsonov authored Dec 27, 2012
  29dd7f20
- DAGCombinerInformation: add a getter that exposes the dagcombine level. · 9aa00f03
  Nadav Rotem authored Dec 27, 2012
  9aa00f03
- [msan] Explicitly link unit tests with libstdc++. · 8798729a
  Evgeniy Stepanov authored Dec 27, 2012
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- Fix new[]/delete mismatch in FullDependence spotted by AddressSanitizer · 75ceb5b5
  Alexey Samsonov authored Dec 27, 2012
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- docs: Update the benchmark with updated perf numbers. · f85d3ee0
  Nadav Rotem authored Dec 27, 2012
  f85d3ee0
- On AVX/AVX2 the type v8i1 is legalized to v8i16, which is an XMM sized · 2a054b44
  Nadav Rotem authored Dec 27, 2012
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- [asan] enable alloc_dealloc_mismatch by default · 1302e8d6
  Kostya Serebryany authored Dec 27, 2012
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- AVX/AVX2: Move the code that lowers vector-trunc from a DAGCo-hook to custom lowering hook. · 8e5d80eb
  Nadav Rotem authored Dec 27, 2012
  8e5d80eb
- [asan] relax asan/lit_tests/malloc_delete_mismatch.cc to make it pass on Mac... · 4a0d946a
  Kostya Serebryany authored Dec 27, 2012
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- [asan/tsan] when unmapping a chunk of user memory, apply... · 6f604b50
  Kostya Serebryany authored Dec 27, 2012
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- Add hasSideEffects=0 to some forms of ROUND, RCP, and RSQRT. · 757f3fc3
  Craig Topper authored Dec 27, 2012
  757f3fc3
- Refactor DAGCombinerInfo. Change the different booleans that indicate if we... · b1dd5245
  Nadav Rotem authored Dec 27, 2012
  b1dd5245
- Move single letter 'P' prefix out of multiclass now that tablegen allows defm... · 09ce4b9e
  Craig Topper authored Dec 27, 2012
  09ce4b9e
- Update tablegen parser to allow defm names to start with #NAME. · 8f0b7394
  Craig Topper authored Dec 27, 2012
  8f0b7394
- Implement dcl.link paragraph 5. · cffa95d7
  Rafael Espindola authored Dec 27, 2012
  cffa95d7
- Add hasSideEffects=0 to some shift and rotate instructions. None of which are... · 396cb795
  Craig Topper authored Dec 27, 2012
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- Mark the divide instructions as hasSideEffects=0. · c7910828
  Craig Topper authored Dec 27, 2012
  c7910828
- add Changes to ELF Writer to layout sections/segments in the output executable · 495d38bf
  Shankar Easwaran authored Dec 27, 2012
  495d38bf
- Update test for backend change. · a487035c
  Eric Christopher authored Dec 27, 2012
  a487035c
- For the dwarf5 split debug info code split out the string section · 3bf29fda
  Eric Christopher authored Dec 27, 2012
  3bf29fda
- FileCheck-ize. · c8a88ee6
  Eric Christopher authored Dec 27, 2012
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- FileCheck-ize. · d6152aab
  Eric Christopher authored Dec 27, 2012
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- Add hasSideEffects=0 to CMP*rr_REV. · 5b807aaa
  Craig Topper authored Dec 27, 2012
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- whitespace · b3f6751d
  Nadav Rotem authored Dec 27, 2012
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- Add mayLoad, mayStore, and hasSideEffects tags to BT/BTS/BTR/BTC instructions.... · 89e86077
  Craig Topper authored Dec 27, 2012
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- changes for the ELF Reader : split up into AtomsELF.h/Adding new permissions permRWX · bbf9ddda
  Shankar Easwaran authored Dec 27, 2012
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- Right now all of the relocations are 32-bit dwarf, and the relocation · 5a6acfa4
  Eric Christopher authored Dec 27, 2012
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- changes to fix Hexagon Relocation so that it accounts for the bitmask properly... · b3cb257b
  Shankar Easwaran authored Dec 27, 2012
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- If all of the write objects are identified then we can vectorize the loop even... · 5350cd31
  Nadav Rotem authored Dec 26, 2012
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- Fix operands and encoding form for ARPL instruction. Register form had and ... · c5573439
  Craig Topper authored Dec 26, 2012
  c5573439
- Add hasSideEffects=0 to some atomic instructions. · d47a70de
  Craig Topper authored Dec 26, 2012
  d47a70de
Dec 26, 2012
- Mark the AL/AX/EAX forms of the basic arithmetic operations has never having side effects. · af237208
  Craig Topper authored Dec 26, 2012
  af237208
- 80 columns. No functionality change. · fca2acb6
  Nick Lewycky authored Dec 26, 2012
  fca2acb6
- Remove mid-optimizer warning. This situation should be handled differently, · 90053a12
  Nick Lewycky authored Dec 26, 2012
  90053a12